GPU Firmware Update via BMC Interrupt Control

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Solution Overview

Problem

In enterprise environments, managing graphics processing unit (GPU) firmware updates is challenging due to the need for system reboots, which disrupts processes and is inefficient, especially in highly virtualized systems where reboots of entire systems are required to update multiple GPUs.

Innovation Solution

A method involving a baseboard management controller (BMC) that issues commands to pause GPU processing, updates firmware without rebooting the processor, and reboots only the relevant GPU, using low-speed and high-speed interfaces to manage firmware updates independently of the host system's resources.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the entire system is rebooted to update GPU firmware, then the firmware update can be applied, but system downtime increases and processing is disrupted

Engineering Contradiction:
Improvefirmware update capabilityVSAvoidsystem downtime
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system separates the reboot operation from the host processor to the GPU itself. The BMC directs the GPU to reboot independently through a low-speed interface after firmware is uploaded, allowing the host processor and other GPUs to continue operating without interruption. This segmentation enables localized firmware updates without system-wide downtime.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the host processor is rebooted to update GPU firmware, then the firmware can be updated, but resource utilization decreases and efficiency is reduced

Engineering Contradiction:
Improvefirmware update capabilityVSAvoidsystem efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The update operation is segmented from the host processor's workload. The BMC handles firmware upload and GPU reboot coordination through a dedicated low-speed interface, while the host processor continues processing tasks through high-speed interfaces. This allows firmware updates without reducing overall system productivity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The BMC acts as an intermediary between the host processor and GPU for firmware updates. It receives firmware images, uploads them to the GPU through the low-speed interface, and manages the GPU reboot process, allowing the host processor to continue its primary functions without being interrupted by update operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If multiple GPUs are updated simultaneously by rebooting the host system, then all GPUs can be updated, but the complexity of managing the update process increases

Engineering Contradiction:
Improvemulti-GPU update capabilityVSAvoidupdate management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The BMC provides a universal interface for managing multiple GPU updates. Through the low-speed interface, the BMC can independently control firmware updates for any number of GPUs connected to the host processor, simplifying the management of multi-GPU systems by providing a single point of control for all update operations.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10996942B1System and method for graphics processing unit firmware updates
Publication Date: 2021.05.04 DELL PROD LP
  • US10996942B1 patent drawing
  • US10996942B1 patent drawing
  • US10996942B1 patent drawing

AI summary

An information handling system includes a processor, a graphics processing unit (GPU) including an interrupt interface coupled to the processor, and a low-speed interface, and a baseboard management controller (BMC) coupled to the low-speed interface. The GPU is configured to receive a first command from the BMC via the low-speed interface to halt processing data, to send a first interrupt to the processor via the interrupt interface in response to receiving the first command, to determine that the processor has halted sending data to the first GPU in response to the first interrupt, and to send a first reply to the command in response to determining that the processor has halted sending data. The BMC is configured to reboot the first GPU without rebooting the processor in response to receiving the first reply.