GPU Floating Point Atomics via Integer Hardware Emulation

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Solution Overview

Problem

Current computing devices lack support for floating point atomic operations, leading to issues with concurrent thread modifications of shared data, where threads may read outdated values due to lack of hardware support for floating point atomic operations.

Innovation Solution

A method is implemented where a graphics processing unit (GPU) selects either a signed or unsigned atomic integer operation based on a floating point number, emulating floating point maximum/minimum operations using integer hardware, to ensure thread-safe data modification and accommodate non-monotonicity across zero.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If floating point atomic operations are implemented in software emulation, then floating point atomic support is achieved on hardware without native support, but processing speed and performance deteriorate

Engineering Contradiction:
Improvefloating point atomic operation supportVSAvoidprocessing speed
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent uses bit pattern manipulation as an intermediary mechanism to translate floating point operations into integer operations. By treating floating point numbers as raw bit patterns and applying integer atomic operations on these patterns, the system achieves floating point atomic functionality through integer hardware, resolving the contradiction between hardware capability and operational versatility

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the operational parameter from floating point arithmetic to integer arithmetic while maintaining the same bit-level representation. This parameter change allows the use of faster integer atomic instructions on hardware that lacks floating point atomic support, improving processing speed while maintaining functional capability

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If integer operations are used to emulate floating point atomics, then hardware compatibility is improved, but precision and accuracy may worsen

Engineering Contradiction:
Improvehardware compatibilityVSAvoidfloating point precision
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent segments the floating point operation into distinct phases: bit pattern extraction, integer atomic operation execution, and result interpretation. This segmentation allows each phase to be optimized independently, maintaining floating point precision through proper bit pattern handling while using integer operations for the atomic update mechanism

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent creates a bit-level copy of the floating point number and performs atomic operations on this copy as an integer. The original floating point precision is preserved in the source and destination values, while the integer operation works on a replicated bit pattern, ensuring no precision loss occurs during the atomic update

Inventive Principle:
Principle #26Copying

Data Source

PatentUS20240256221A1Floating point atomics using integer hardware
Publication Date: 2024.08.01 QUALCOMM INC
  • US20240256221A1 patent drawing
  • US20240256221A1 patent drawing
  • US20240256221A1 patent drawing

AI summary

This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for floating point min/max atomics using integer hardware. A data processor may obtain a first indication of a floating point number associated with a floating point operation. The data processor may select a signed atomic integer operation or an unsigned atomic integer operation based on at least one of the floating point number or the floating point operation, where the signed atomic integer operation is associated with a condition being met and the unsigned atomic integer operation is associated with a failure of the condition to be met.