GPU Frame Buffer Cache for Multi-GPU Latency Reduction
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Solution Overview
Problem
Multi-GPU systems face inefficiencies due to insufficient local frame buffer capacity, leading to increased system memory accesses and bus bandwidth pollution, causing latency and performance issues in graphic-intense applications.
Innovation Solution
Designate one GPU subsystem as a rendering engine and another as a cache accelerator, using the frame buffers as cache memory to reduce system memory accesses by directing memory requests through a peer-to-peer path without accessing the system bus, utilizing a graphics address remapping table to create a contiguous memory space and enabling GPUs to access cache accelerators.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If system memory is used to store texture data that exceeds local frame buffer capacity, then storage capacity is improved, but system bus bandwidth is polluted and latency increases
Solution Approach 1:
The patent introduces frame buffers as intermediary cache memory between the local GPU memory and system memory. When local frame buffer capacity is insufficient, data is stored in the frame buffer of another GPU in the multi-GPU system rather than directly in system memory, reducing system bus bandwidth pollution and latency.
Solution Approach 2:
The patent utilizes the vertical dimension of multi-GPU architecture by allowing GPUs to access each other's frame buffers. This creates an additional memory dimension beyond local frame buffer and system memory, enabling fast access to extended storage capacity without polluting the system bus.
2Quantity of substance
If system memory is used to store texture data, then storage capacity is improved, but system bus bandwidth is occupied and other data delivery is delayed
Solution Approach 1:
The patent segments the memory hierarchy into multiple independent frame buffers associated with different GPUs. This segmentation allows parallel access to different frame buffers through different GPUs, preventing system bus bandwidth pollution and maintaining high data delivery throughput for other applications.
Solution Approach 2:
The patent makes frame buffers universal by allowing any GPU to access any frame buffer in the multi-GPU system. This multi-functionality enables frame buffers to serve both as local display memory and as shared cache memory, eliminating the need to use system memory and preserving system bus bandwidth for other data deliveries.
3Quantity of substance
If multiple GPUs access the same memory block simultaneously, then storage capacity is shared, but access operations must be synchronized and performance decreases
Solution Approach 1:
The patent segments the shared memory resource into multiple separate frame buffers, each associated with a specific GPU. This segmentation allows multiple GPUs to access different frame buffers simultaneously without synchronization, as each GPU has direct access to its own frame buffer and can access other frame buffers through dedicated peer-to-peer interconnects.
Data Source
AI summary
A method and system for using a graphics processing unit (“GPU”) frame buffer in a multi-GPU computing device as cache memory are disclosed. Specifically, one embodiment of the present invention sets forth a method, which includes the steps of designating a first GPU subsystem in the multi-GPU computing device as a rendering engine, designating a second GPU subsystem in the multi-GPU computing device as a cache accelerator, and directing an upstream memory access request associated with an address from the first GPU subsystem to a port associated with a first address range, wherein the address falls within the first address range. The first and the second GPU subsystems include a first GPU and a first frame buffer and a second GPU and a second frame buffer, respectively.