GPU Inter-Warp GPR Data Sharing via Crossbar Switch
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Solution Overview
Problem
Existing GPU architectures require data to be written to shared memory for inter-warp access, which is slower and more power-consuming compared to direct access within the general purpose register (GPR), limiting data transfer speed and increasing power consumption.
Innovation Solution
A graphics processing unit (GPU) with a memory read/write hub and crossbar switch that allows direct data transfer between dedicated portions of the GPR without intermediate shared memory access, using a move data instruction that includes operands for source and destination GPR portions, enabling parallel execution and reduced data movement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If data is written to shared memory for inter-warp access, then data accessibility between warps is improved, but data transfer speed deteriorates and power consumption increases
Solution Approach 1:
The patent segments the GPR address space into multiple banks, allowing different warps to access different banks simultaneously. This segmentation enables parallel access paths, so data can be shared between warps without consolidating through a single shared memory interface, thereby maintaining high speed while achieving inter-warp accessibility.
Solution Approach 2:
The patent introduces a crossbar switch as an intermediary component between processing cores and GPR banks. This crossbar switch enables direct routing of data between different warp contexts without requiring writes to shared memory, thus preserving transfer speed while facilitating inter-warp data sharing.
2Adaptability or versatility
If data is written to shared memory for inter-warp access, then data accessibility between warps is improved, but power consumption increases
Solution Approach 1:
By segmenting the GPR into multiple banks that can be independently accessed, the patent eliminates the need to write data to shared memory for inter-warp access. Each bank can serve different warp contexts, enabling direct access without the energy cost of shared memory transactions.
Solution Approach 2:
The GPR structure is designed to serve multiple warps directly without requiring external shared memory infrastructure. Each processing core can access its allocated GPR banks and share data with other warps through the crossbar switch, making the system self-sufficient and avoiding the power consumption associated with shared memory access.
3Speed
If direct data transfer between GPR portions is enabled, then data transfer speed is improved, but device complexity increases
Solution Approach 1:
The crossbar switch is designed as a universal routing component that handles multiple data transfer scenarios: intra-warp access, inter-warp access, and bank arbitration. This multi-functional design achieves direct data transfer capability without requiring separate specialized hardware for each access type, thereby limiting the increase in device complexity.
Solution Approach 2:
The patent adds a banking dimension to the GPR address space, organizing registers into multiple banks that can be accessed in parallel. This dimensional reorganization enables direct inter-warp access through bank selection rather than through shared memory, achieving speed improvement with manageable complexity through systematic address space design.
Data Source
AI summary
Methodologies and architectures are provided for inter-thread sharing of data in a general purpose register (GPR) of a multiprocessor apparatus. The data sharing is performed by a graphics processing unit (GPU) having at least one processing cluster including a plurality of processing cores (PCs) configured for parallel operation. Each PC of a cluster is configured to utilize a dedicated portion of the GPR. The GPU further includes a shared memory for the cluster, and a memory read/write hub coupled to the GPR and shared memory, the hub including a crossbar switch. A PC executes a move data instruction, including operands referencing a destination portion of the GPR and a source portion assigned to the PC, to retrieve data from the source portion. The memory read/write hub writes the data, via the crossbar switch, to the destination portion of the GPR without first writing the data to the shared memory.