Parallel Tempering Simulation via GPU Grid Memory

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Solution Overview

Problem

Existing parallel tempering techniques face challenges in efficiently simulating complex dynamic systems, such as quantum processors with thousands of qubits, due to limitations in system representation and parallelization.

Innovation Solution

The method involves using a graphical processing unit (GPU) to instantiate and update replicas of a dynamic system across multiple blocks and threads, with synchronized grid-level memory for replica exchange and isoenergetic cluster moves, allowing for efficient computation of complex systems like quantum processors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional MCMC techniques are used to simulate dynamic systems, then the simulation can be performed with simple implementation, but the mixing performance and overall performance are insufficient

Engineering Contradiction:
Improvemixing performanceVSAvoidimplementation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system divides the dynamic system into multiple replicas, each simulated at different temperatures. This segmentation allows independent updating of each replica while maintaining overall system performance through replica exchange, directly improving mixing performance without requiring complete redesign of the simulation framework.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention introduces temperature as a key parameter to differentiate replicas. By simulating multiple copies at different temperatures and periodically exchanging them, the system enhances sampling efficiency and mixing performance. The temperature parameter transformation enables the system to escape local minima more effectively.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If parallel tempering is implemented with GPUs to improve computational performance, then productivity increases, but limitations on system size arise due to architectural considerations

Engineering Contradiction:
Improvecomputational performanceVSAvoidsystem size capacity
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The invention organizes replicas into multiple blocks, with each block containing a subset of replicas. This hierarchical segmentation allows the system to scale beyond single-block limitations by distributing replicas across multiple blocks, thereby increasing the total system size capacity while maintaining GPU parallelization benefits.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system introduces a block dimension in addition to the replica dimension. Replicas are arranged in a two-dimensional structure (blocks × replicas per block), allowing parallel tempering to scale to larger systems by adding more blocks. This dimensional extension overcomes architectural limitations of single-block implementations.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If multiple replicas are simulated at different temperatures with replica exchange, then mixing performance improves, but the computational complexity and memory requirements increase

Engineering Contradiction:
Improvemixing performanceVSAvoidcomputational complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

By dividing replicas into blocks that can be processed independently and then exchanged, the computational complexity is managed through modular organization. Each block can be updated and exchanged separately, reducing the overall computational burden compared to treating all replicas as a single monolithic system.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11567779B2Systems and methods for simulation of dynamic systems
Publication Date: 2023.01.31 D WAVE SYSTEMS INC
  • US11567779B2 patent drawing
  • US11567779B2 patent drawing
  • US11567779B2 patent drawing

AI summary

A highly parallelized parallel tempering technique for simulating dynamic systems, such as quantum processors, is provided. Replica exchange is facilitated by synchronizing grid-level memory. Particular implementations for simulating quantum processors by representing cells of qubits and couplers in grid-, block-, and thread-level memory are discussed. Parallel tempering of such dynamic systems can be assisted by modifying replicas based on isoenergetic cluster moves (ICMs). ICMs are generated via secondary replicas which are maintained alongside primary replicas and exchanged between blocks and/or generated dynamically by blocks without necessarily being exchanged. Certain refinements, such as exchanging energies and temperatures through grid-level memory, are also discussed.