GPU Kernel Register Count Optimization for GEMM
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Solution Overview
Problem
Existing GPU implementations for general matrix-matrix multiplication (GEMM) often produce sub-optimal code due to default register allocation strategies, leading to performance inefficiencies, especially on newer hardware with increased register capabilities.
Innovation Solution
A method to systematically optimize the maximum register count (MRC) for GPU kernels by compiling and testing different register usage ceilings to determine the fastest kernel for GEMM operations, allowing for variable-dimension kernels and unconventional block sizes to enhance performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If the default compiler setting is used to generate GPU kernels, then the programming complexity is reduced and ease of operation is improved, but the GEMM performance deteriorates due to sub-optimal register allocation
Solution Approach 1:
The patent pre-compiles multiple kernel versions with different maximum register count settings before runtime. This preliminary action creates a library of optimized kernels that can be selected based on specific GEMM operation requirements, thereby resolving the contradiction by providing both ease of operation (automatic selection) and high performance (pre-optimized variants).
Solution Approach 2:
The patent implements dynamic kernel selection at runtime based on the specific GEMM operation parameters. Instead of using a static default compiler setting, the system dynamically chooses the most appropriate pre-compiled kernel version, achieving both ease of operation (automatic adaptation) and optimal performance for each specific case.
2Productivity
If the maximum number of registers is increased in GPU kernels, then the GEMM performance is improved through better data caching, but the device complexity increases due to hardware constraints and compilation complexity
Solution Approach 1:
The patent segments the kernel compilation process into multiple discrete versions, each with a specific maximum register count setting. This segmentation allows the system to explore different register allocation strategies without overwhelming complexity, as each segmented version can be independently optimized and selected based on performance requirements.
Solution Approach 2:
The patent systematically varies the maximum register count parameter across different kernel versions to identify optimal settings for GEMM operations. By changing this critical parameter and measuring performance impacts, the patent resolves the contradiction by finding the sweet spot between register usage and performance without excessive device complexity.
3Productivity
If multiple kernel versions with different register counts are compiled and tested, then the GEMM performance is optimized, but the manufacturing precision requirement increases due to systematic optimization needs
Solution Approach 1:
The patent performs preliminary systematic testing of different kernel versions during the compilation phase, establishing performance benchmarks before runtime. This preliminary action creates a knowledge base of optimal kernel selections that reduces the need for complex runtime decisions, resolving the contradiction by achieving high performance through pre-established precision.
4Ease of manufacture
If the default register allocation strategy is used, then the compilation process is simplified and ease of manufacture is improved, but the loss of time occurs due to performance inefficiencies in GEMM operations
Solution Approach 1:
The patent performs preliminary optimization work during the compilation phase by pre-compiling multiple kernel versions with different register settings. This shifts the complexity from runtime to compile time, maintaining compilation simplicity while eliminating execution time losses through pre-optimized kernel selection.
Solution Approach 2:
The patent implements dynamic kernel selection that adapts to specific GEMM operation characteristics at runtime. This dynamic approach maintains ease of manufacture (simple interface) while minimizing execution time by automatically selecting the most appropriate pre-optimized kernel version for each operation.
Data Source
AI summary
A method and system performing a general matrix-matrix multiplication (GEMM) operation using a kernel compiled with optimal maximum register count (MRC). During operation, the system may generate the kernel compiled with optimal MRC. This may involve determining a fastest compiled kernel among a set of compiled kernels by comparing the speeds of the compiled kernels. Each kernel may be compiled with a different MRC value between zero and a predetermined maximum number of registers per thread. The fastest compiled kernel is determined to be the kernel with optimal MRC. The system may receive data representing at least two matrices. The system may select the kernel compiled with optimal MRC, and perform the GEMM operation on the two matrices using the selected kernel. Some embodiments may also perform general matrix-vector multiplication (GEMV), sparse matrix-vector multiplication (SpMV), or k-means clustering operations using kernels compiled with optimal MRC.