Parallel Processing Unit Large Integer Library Segmentation
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Solution Overview
Problem
Current processors are inefficient in handling large integers due to their limited register capacity and high latency in memory operations, which hinders the processing of large integers that exceed 64 bits in width.
Innovation Solution
A system and method for generating executable code that utilizes a parallel processing unit, specifically a large integer library optimized for parallel processing, allowing large integer operations to be performed efficiently by compiling source code linked to the library and executing it on a parallel processing unit with multiple cores operating in parallel.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If large integers are processed by breaking them into smaller units and using available registers, then the operation can be performed, but the number of available registers is insufficient to store all intermediate results
Solution Approach 1:
The patent segments the large integer processing into multiple stages, with each stage handling a portion of the intermediate results. Instead of requiring all intermediate results to be stored simultaneously in registers, the processing is divided into batches that can be handled with the limited register capacity available in parallel processing units.
Solution Approach 2:
The patent transitions from a register-based storage model to a memory-based storage model, effectively moving the storage dimension from on-chip registers to off-chip memory. This allows intermediate results to be stored externally, bypassing the limitation of limited register capacity while maintaining the ability to process large integers.
2Quantity of substance
If intermediate results are transferred from registers to memory for temporary storage, then storage capacity is sufficient, but the transfer operation has high latency and slows down processing
Solution Approach 1:
The patent performs preliminary actions by pre-fetching data and pre-positioning intermediate results in optimal locations before they are needed. This reduces the latency of memory operations by ensuring that data is already in the correct location when needed, rather than performing transfers on-demand.
Solution Approach 2:
The patent maintains continuity of useful action by overlapping memory transfer operations with computation operations. While intermediate results are being transferred to memory, other computational tasks are performed, ensuring that the processing pipeline remains active and minimizing idle time.
3Productivity
If conventional processors with limited registers are used, then device complexity is low, but productivity in processing large integers is insufficient
Solution Approach 1:
The patent segments the large integer processing task across multiple processing units and memory locations, allowing parallel execution of multiple operations simultaneously. This segmentation enables high productivity by utilizing the parallel processing capability, despite the increased device complexity.
Solution Approach 2:
The patent designs the parallel processing unit with universal components that can handle multiple types of operations (addition, multiplication, etc.) on large integers. This multi-functionality allows a single complex device to perform various large integer operations efficiently, justifying the increased complexity through versatile productivity.
Data Source
AI summary
A system, method, and computer program product for generating executable code for performing large integer operations on a parallel processing unit is disclosed. The method includes the steps of compiling a source code linked to a large integer library to generate an executable file and executing the executable file to perform a large integer operation using a parallel processing unit. The large integer library includes functions for processing large integers that are optimized for the parallel processing unit.