Lock-Bit Memory Context Switching for GPU Deadlock Prevention

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Solution Overview

Problem

In graphics processing units (GPUs), atomic operations are hindered by thread preemption, leading to lock retention and potential deadlocks, which result in performance loss and increased risk of deadlock, as a preempted thread retains locks indefinitely, preventing other threads from accessing shared memory.

Innovation Solution

Implementing a method that releases acquired locks when a thread is preempted, allowing active threads to reacquire previously held locks, thereby preventing deadlock and enhancing performance by managing address and warp lock-bits within the streaming multiprocessor.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a thread retains a lock on a shared memory location after preemption, then atomic operation correctness is maintained, but other threads are prevented from accessing the memory location for an indeterminately long period, resulting in performance loss

Engineering Contradiction:
Improveatomic operation correctnessVSAvoidthread access performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system performs preliminary action by releasing locks at the point of preemption (context switch) rather than waiting for the original thread to complete. The lock state is reset in advance during context switching, preventing indefinite lock retention and enabling other threads to proceed without unnecessary delays.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The lock management system transitions from a static model (lock held until thread completion) to a dynamic model where locks are released and reacquired based on execution context. Thread group locks are conditionally released during preemption and can be reacquired by any thread in the group, making the lock system adaptive to scheduling changes.

Inventive Principle:
Principle #15Dynamics

2Reliability

If a preempted thread retains locks indefinitely, then atomic operation integrity is preserved, but deadlock may occur when threads wait for each other's locks

Engineering Contradiction:
Improveatomic operation integrityVSAvoiddeadlock waiting time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs preliminary action by releasing locks at the point of preemption (context switch) rather than waiting for the original thread to complete. The lock state is reset in advance during context switching, preventing indefinite lock retention and enabling other threads to proceed without unnecessary delays.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The preemption event, which interrupts atomic operation execution, is converted into a beneficial lock release opportunity. Instead of treating preemption as a harmful interruption that must be waited through, the system uses it as a trigger to release locks, thereby preventing deadlock and allowing other threads to make progress.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Productivity

If thread group locks are shared between multiple thread groups, then resource utilization is improved, but lock contention increases when threads from different groups access the same memory location

Engineering Contradiction:
Improvememory access utilizationVSAvoidlock acquisition time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The lock management system is segmented into two independent layers: thread group locks (coarse-grained) and address locks (fine-grained). This segmentation allows threads within a group to access memory locations without contending for the same lock, as each address has its own lock bit. The hierarchy divides the locking problem into manageable segments that reduce contention.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system applies local quality by providing fine-grained address-level locking for specific memory locations while maintaining coarse-grained thread group locks for overall access control. Each memory address has its own lock state, allowing localized access decisions that improve utilization without sacrificing integrity.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9678897B2Approach for context switching of lock-bit protected memory
Publication Date: 2017.06.13 NVIDIA CORP
  • US9678897B2 patent drawing
  • US9678897B2 patent drawing
  • US9678897B2 patent drawing

AI summary

A streaming multiprocessor in a parallel processing subsystem processes atomic operations for multiple threads in a multi-threaded architecture. The streaming multiprocessor receives a request from a thread in a thread group to acquire access to a memory location in a lock-protected shared memory, and determines whether a address lock in a plurality of address locks is asserted, where the address lock is associated the memory location. If the address lock is asserted, then the streaming multiprocessor refuses the request. Otherwise, the streaming multiprocessor asserts the address lock, asserts a thread group lock in a plurality of thread group locks, where the thread group lock is associated with the thread group, and grants the request. One advantage of the disclosed techniques is that acquired locks are released when a thread is preempted. As a result, a preempted thread that has previously acquired a lock does not retain the lock indefinitely.