GPU Management Component for Virtual Machine Scheduling Latency

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Solution Overview

Problem

Existing data processing systems that utilize virtualization concepts face performance issues due to CPU scheduling latency, leading to GPU idleness and potential data loss when VMs are not scheduled back on the CPU in time.

Innovation Solution

The system incorporates a graphics processor with a management component that enables the GPU to perform suspension tasks for virtual machines, reducing dependency on CPU scheduling and allowing the GPU to manage time-slices independently.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Extent of automation

If CPU scheduling is used to manage VM access to GPU, then virtualization control is achieved, but CPU scheduling latency causes GPU idleness and performance loss

Engineering Contradiction:
Improvevirtualization controlVSAvoidGPU utilization
Core Design Contradiction:
Extent of automationVSProductivity

Solution Approach 1:

The GPU management component autonomously manages VM scheduling and suspension without CPU intervention. The GPU independently decides which VM to serve next and when to suspend current VMs, eliminating CPU scheduling latency and enabling continuous GPU operation.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The scheduling control function is extracted from the CPU and transferred to the GPU management component. This separation removes the bottleneck where CPU scheduling latency caused GPU idleness, allowing the GPU to independently manage its own resource allocation.

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If CPU schedules VMs for GPU access, then centralized control is maintained, but scheduling delays cause VMs to miss deadlines and data loss

Engineering Contradiction:
Improvecentralized controlVSAvoidscheduling delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The GPU management component performs self-service by independently tracking VM deadlines and autonomously suspending VMs that miss their scheduled times. This eliminates reliance on CPU scheduling for deadline enforcement, preventing data loss while maintaining control through the arbiter.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The system performs preliminary actions by pre-scheduling VMs with their deadlines and pre-configuring the GPU management component to automatically suspend VMs when deadlines are missed. This advance preparation ensures timely suspension without waiting for CPU intervention.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If GPU suspends VMs autonomously, then GPU idleness is eliminated, but complexity of GPU management increases

Engineering Contradiction:
ImproveGPU utilizationVSAvoidGPU management complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The GPU management component integrates multiple functions including scheduling, deadline tracking, suspension decision-making, and VM state management into a single autonomous unit. This consolidation manages complexity by combining related functions rather than distributing them across multiple separate systems.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system implements feedback mechanisms where the GPU management component continuously monitors VM status, deadline compliance, and GPU availability. This real-time feedback enables autonomous scheduling decisions and maintains optimal GPU utilization while managing complexity through systematic monitoring and response protocols.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20250173198A1Data processing system
Publication Date: 2025.05.29 ARM LTD
  • US20250173198A1 patent drawing
  • US20250173198A1 patent drawing
  • US20250173198A1 patent drawing

AI summary

Data processing systems, methods, computer program products, devices, and graphics processors are provided that substantially remove, or reduce, latencies introduced or incurred by a (host) processor e.g. a central processing unit (CPU), during virtualisation, in which virtual machines that are operable to execute on the (host) processor are scheduled or assigned to the graphics processor in a time-slice manner.