GPU Map Tile Generation Parallel Processing

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Solution Overview

Problem

Current CPU-based methods for generating digital map tiles are slow, energy-intensive, and time-consuming, especially when dealing with large map overlays, as they can only process one pixel at a time, leading to prolonged development and rendering times.

Innovation Solution

A GPU-based system that processes hundreds of thousands of pixels simultaneously, using machine-learning GPUs and custom software to generate map tiles efficiently, reducing the time to produce a map tile set from days or weeks to less than an hour, by loading source maps onto GPU memory and executing GPU kernels to produce output tiles.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If CPU-based methods are used to generate map tiles, then the processing can be performed with standard hardware, but the generation time becomes extremely long (days or weeks) and energy consumption increases

Engineering Contradiction:
Improvemap tile generation speedVSAvoidtime required to generate map tiles
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent replaces the CPU-based sequential processing mechanism with a GPU-based parallel processing mechanism. The GPU architecture enables simultaneous processing of multiple pixels across numerous map tiles through thousands of cores, fundamentally changing the processing paradigm from sequential to parallel execution. This substitution reduces generation time from days or weeks to hours or minutes while maintaining standard hardware compatibility.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent divides the map data into discrete tiles that can be processed independently and simultaneously. Each tile is further segmented into pixels that can be processed in parallel by different GPU cores. This segmentation enables the system to process multiple tiles concurrently, dramatically increasing throughput and reducing overall generation time compared to sequential CPU processing.

Inventive Principle:
Principle #1Segmentation

2Productivity

If CPU-based methods are used to generate map tiles, then the system architecture remains simple, but the energy consumption increases and development time is prolonged

Engineering Contradiction:
Improvemap tile generation speedVSAvoidenergy consumption during map tile generation
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent substitutes CPU-based processing with GPU-based processing, leveraging the GPU's architecture designed for parallel computations. This substitution dramatically improves energy efficiency for map tile generation tasks, as GPUs can process multiple pixels simultaneously using optimized parallel algorithms, reducing the total energy required compared to sequential CPU processing that must handle each pixel individually.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the processing parameters by utilizing the GPU's parallel execution model with thousands of cores working simultaneously on pixel processing. This parameter change from sequential to parallel processing fundamentally alters the energy consumption profile, enabling the system to complete the same task with significantly lower energy expenditure by distributing the computational load across multiple processing units that operate concurrently.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If smaller map segments are used, then rendering performance improves and bandwidth use decreases, but the processing time to generate these segments increases significantly

Engineering Contradiction:
Improverendering performanceVSAvoidcomplexity of processing multiple small tiles
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements segmentation by dividing the map into small, manageable tiles that can be rendered independently. This segmentation improves rendering performance and reduces bandwidth requirements, as only the necessary small tiles need to be transmitted and processed. The GPU-based system manages the complexity of processing these numerous small tiles through parallel execution, turning what would be a complex sequential task into an efficient parallel operation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent replaces the CPU's sequential processing capability with the GPU's parallel processing architecture to handle the complexity of generating numerous small tiles. The GPU's thousands of cores can simultaneously process different tiles and pixels, managing the computational complexity that would otherwise overwhelm a single CPU core. This substitution enables the system to handle the increased number of small segments without proportionally increasing processing time.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS11978160B2GPU-based digital map tile generation method and system
Publication Date: 2024.05.07 CURTIS DANIEL E
  • US11978160B2 patent drawing
  • US11978160B2 patent drawing
  • US11978160B2 patent drawing

AI summary

A method of generating map images in a computing device includes loading source map data or vector data onto a host; loading an output tile system; determining which output tiles to process by cross-referencing the source map data or the vector data with the output tile system; loading source maps or vector data to a graphics processing unit memory; executing a graphics processing unit kernel to process data and return a map tile to the host; writing the map tile to a file on a database; determining if all tiles have been processed; and generating output map tiles. A map tile generation system includes computing devices; servers connected via a network; non-transitory computer-readable storage media storing instructions and machine-learning graphics processor units coupled to the servers via a kernel interface program.