GPU Memory Defragmentation for Continuous Idle Blocks

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Solution Overview

Problem

Existing memory defragmentation methods in graphics processing units (GPUs) fail to fully utilize idle blocks due to discontinuous fragmentation, leading to inefficiencies in memory usage.

Innovation Solution

A method that migrates data from tail non-idle blocks to a target idle block with sufficient size, expanding the available idle space and ensuring continuous idle blocks are formed, thereby optimizing memory utilization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If data is migrated from tail non-idle blocks to target idle blocks, then the size of available idle blocks is expanded, but the complexity of memory management operations increases

Engineering Contradiction:
Improvesize of available idle blocksVSAvoidcomplexity of memory management operations
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The system performs preliminary identification of tail non-idle blocks and target idle blocks before executing data migration. By pre-selecting candidate blocks that meet size requirements and verifying their suitability, the system prepares the memory defragmentation operation in advance, reducing the complexity of the actual migration process while ensuring expansion of available idle block space.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system introduces an intermediary selection process that identifies suitable target idle blocks based on size matching criteria. This intermediary step acts as a mediator between the tail non-idle blocks and potential target blocks, selecting optimal pairs for migration that maximize idle space consolidation while maintaining manageable operation complexity through systematic matching rules.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Quantity of substance

If memory defragmentation is performed by finding and merging adjacent idle blocks, then memory utilization is improved, but the time required for defragmentation operations increases

Engineering Contradiction:
Improvememory utilization efficiencyVSAvoidtime required for defragmentation operations
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The system extracts the tail non-idle blocks from their original positions and relocates them to adjacent positions following the tail idle block. By taking out these blocks and placing them contiguously, the system quickly consolidates idle space without requiring complex searches through the entire memory structure, thus improving memory utilization while reducing defragmentation time.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of searching from the beginning of memory to find idle blocks, the system inverts the approach by starting from the tail idle block and working backwards to identify and migrate tail non-idle blocks. This inverted strategy reduces the search scope and time required, as it focuses only on the relevant region near the tail of memory, thereby achieving faster defragmentation while maintaining improved memory utilization.

Inventive Principle:
Principle #13The other way round (Inversion)

Data Source

PatentUS12449989B2Memory defragmentation method and apparatus, device, and storage medium
Publication Date: 2025.10.21 TENCENT TECHNOLOGY (SHENZHEN) CO LTD
  • US12449989B2 patent drawing
  • US12449989B2 patent drawing
  • US12449989B2 patent drawing

AI summary

This application provides a memory defragmentation method performed by a computer device. The method includes: obtaining n idle blocks before a tail idle block in a memory of a graphic processing unit, the tail idle block located at a head of remaining unallocated idle blocks in the memory, and n being a positive integer; obtaining tail non-idle blocks in the memory, the tail non-idle blocks comprising one allocated block or a plurality of continuous allocated blocks immediately before the tail idle block in the memory; determining one or more target idle blocks in the n idle blocks, a size of the target idle block being not less than a size of the allocated blocks among the tail non-idle blocks; migrating data in the tail non-idle blocks to the target idle blocks; and updating the head of remaining unallocated idle blocks in the memory by releasing the tail non-idle blocks.