Cross-Node GPU Memory Mapping for Direct Shared Access

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Solution Overview

Problem

Existing systems face inefficiencies in sharing memory between GPUs across different nodes in a GPU cluster, requiring expensive operations to copy data and complicating programming, leading to suboptimal resource utilization.

Innovation Solution

Implementing memory managers to facilitate sharing of processor memory across multiple processors, including GPUs, by creating memory maps and virtual address spaces that allow direct access and mapping between nodes, using both user-mode and kernel-mode drivers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If memory copying operations are used to transfer data between GPUs on different nodes, then data can be transferred between nodes, but the operation becomes expensive and inefficient

Engineering Contradiction:
Improvememory copying costVSAvoiddata transfer efficiency
Core Design Contradiction:
Loss of energyVSProductivity

Solution Approach 1:

The patent merges the memory spaces of multiple GPUs across different nodes by establishing a unified memory architecture. Memory managers on each node map local GPU memory to a global address space, allowing any GPU to directly access memory on any other GPU as if it were local memory, eliminating the need for explicit copy operations.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

Memory managers act as intermediaries between GPUs on different nodes. These managers handle the complexity of address translation and memory mapping, allowing simple direct memory access from any GPU to any memory location while the memory manager handles the underlying communication and mapping details.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If direct memory access between GPUs on different nodes is implemented, then resource utilization improves, but system complexity increases

Engineering Contradiction:
Improveresource utilizationVSAvoidmemory sharing system complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system segments memory management functions by introducing separate memory manager components on each node. Each memory manager independently manages its local GPU memory and handles mapping to the global address space, distributing the complexity across multiple manageable units rather than requiring a single complex centralized system.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Memory managers serve as intermediary components that abstract the complexity of cross-node memory access. They provide standardized interfaces for memory mapping and address translation, shielding the rest of the system from the underlying complexity while enabling direct memory access capabilities.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of operation

If memory maps and virtual address spaces are created for cross-node access, then programming is simplified, but implementation complexity increases

Engineering Contradiction:
Improveprogramming simplicityVSAvoidmemory mapping implementation
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent creates a unified global address space that presents a consistent memory model to all GPUs regardless of their physical location. This equipotential memory space allows programmers to access memory on any node using the same simple addressing mechanism, eliminating the need for node-specific memory access patterns and simplifying programming.

Inventive Principle:
Principle #12Equipotentiality

Solution Approach 2:

Memory managers act as intermediaries that handle the complex tasks of address translation and memory mapping automatically. Programmers interact with simplified virtual addresses, while the memory managers translate these to appropriate physical memory locations on the appropriate nodes, hiding the implementation complexity from the programming interface.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20260017206A1Sharing memory among multiple processors
Publication Date: 2026.01.15 NVIDIA CORP
  • US20260017206A1 patent drawing
  • US20260017206A1 patent drawing
  • US20260017206A1 patent drawing

AI summary

Apparatuses, systems, and techniques to facilitate memory management. In at least one embodiment, data from one or more first shared physical memory locations is accessed based, at least in part, on one or more virtual addresses corresponding to one or more second shared physical memory locations.