Discrete GPU Memory DVFS for Power-Balanced Performance

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Solution Overview

Problem

In discrete graphics products, the memory subsystem consumes a significant portion of the overall device power, reducing the performance of compute and render components due to excessive power consumption.

Innovation Solution

Implementing dynamic voltage and frequency scaling (DVFS) in the memory subsystem of discrete graphics systems based on workload demands, allowing the memory subsystem to adjust its voltage and frequency to optimize performance within the device's power budget.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the memory subsystem operates at high voltage and frequency to maximize performance, then memory performance is improved, but power consumption increases excessively

Engineering Contradiction:
Improvememory performanceVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic voltage and frequency scaling (DVFS) in the memory subsystem, allowing it to transition between multiple operational states (e.g., STATE 1 with lower voltage/frequency and STATE 2 with higher voltage/frequency) based on real-time workload demands. This dynamic adjustment resolves the contradiction by providing high performance only when needed while consuming less power during lower-demand periods

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the voltage and frequency parameters of the memory subsystem based on workload characteristics. By monitoring memory access patterns and adjusting voltage/frequency accordingly, the system optimizes the trade-off between performance and power consumption, transitioning parameters only when workload thresholds are crossed

Inventive Principle:
Principle #35Parameter changes

2Productivity

If the memory subsystem consumes more power to improve memory performance, then memory-intensive workloads benefit, but the compute and render engines suffer from reduced available power

Engineering Contradiction:
Improvememory-intensive workload performanceVSAvoidavailable power for compute and render
Core Design Contradiction:
ProductivityVSPower

Solution Approach 1:

The DVFS mechanism allows the memory subsystem to dynamically adjust its power consumption based on actual memory access patterns. During compute-intensive periods, the memory subsystem can operate at lower power states, freeing up power headroom for the compute and render engines. During memory-intensive workloads, the system transitions to higher performance states only when necessary

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system incorporates feedback mechanisms that monitor both memory access patterns and overall device power budget. This feedback loop enables intelligent decision-making about when to scale memory performance up or down, ensuring that power allocation balances the needs of different subsystems based on real-time conditions

Inventive Principle:
Principle #23Feedback

3Adaptability or versatility

If dynamic voltage and frequency scaling is implemented in the memory subsystem, then power management flexibility is improved, but device complexity increases

Engineering Contradiction:
Improvepower management flexibilityVSAvoidmemory subsystem control complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The DVFS implementation is segmented into discrete operational states (e.g., STATE 1, STATE 2) with predefined voltage and frequency combinations. Each state has associated control logic that manages transitions between states, breaking down the complex continuous control problem into manageable discrete steps with clear transition criteria

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20260010220A1Dynamic voltage and frequency scaling for discrete graphics systems
Publication Date: 2026.01.08 INTEL CORP
  • US20260010220A1 patent drawing
  • US20260010220A1 patent drawing
  • US20260010220A1 patent drawing

AI summary

In one embodiment, a system on a chip integrated circuit (SoC) is provided that includes graphics processing resources including one or more graphics processing cores a memory subsystem including a memory controller, a physical interface, and a memory device and circuitry to dynamically adjust a voltage and frequency of the memory subsystem based on a workload executed by the graphics processing resources.