GPU Memory Address Flipping for Data Integrity Verification
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Solution Overview
Problem
Display subsystems in safety-critical applications, such as automotive advanced driver assistance systems, face challenges in ensuring data content integrity, as faults during image processing can lead to incorrect image display, compromising safety.
Innovation Solution
The technique involves processing data twice using a graphics processing unit (GPU) or another processor, storing intermediate results using different memory access patterns, and comparing the results to detect any discrepancies, which can indicate hardware or memory errors, and issuing a warning if differences are found.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data processing is performed once through the display subsystem, then processing speed and productivity are maintained, but data content integrity cannot be verified and faults may go undetected
Solution Approach 1:
The processing pipeline is segmented into two separate processing paths: a first path that processes image data through the display subsystem and a second path that performs identical processing independently. This segmentation allows verification of data integrity by comparing results from both paths without significantly impacting overall processing throughput, as the segments operate in parallel.
Solution Approach 2:
A copy of the image data is created and processed through a second independent processing path. This copy is used to generate a second set of processed image data that can be compared against the first path's output to verify data content integrity, while the original processing continues uninterrupted.
2Reliability
If no verification mechanism is implemented, then device complexity remains low and processing is simple, but faults in memory or processing circuits cannot be detected
Solution Approach 1:
A comparison circuit acts as an intermediary between the two processing paths, receiving processed image data from both paths and comparing them to detect discrepancies. This intermediary component enables fault detection without requiring complete redesign of the processing architecture, adding verification capability through a dedicated comparison stage.
Solution Approach 2:
The system performs preliminary processing through two parallel paths before final output, allowing verification to occur before the processed data is displayed. This preliminary dual-path processing ensures that any faults in memory or processing circuits are detected before they can affect the final displayed image.
3Reliability
If traditional testing methods are used, then implementation is straightforward, but permanent, intermittent, and transient faults cannot be continuously detected
Solution Approach 1:
The verification process operates continuously alongside normal image processing through parallel dual-path processing. Both processing paths run simultaneously and continuously, with the comparison circuit constantly monitoring for discrepancies, enabling detection of permanent, intermittent, and transient faults without interrupting the useful action of image processing.
Solution Approach 2:
The system performs periodic comparison of processed image data from both paths at defined intervals or at specific processing stages. This periodic verification action allows continuous monitoring for faults while managing processing overhead by comparing results at strategic points rather than continuously at every processing step.
Data Source
AI summary
Techniques of this disclosure may include processing data using one or more processors to produce a first image, including storing intermediate first results of processing the data in at least one internal memory of the one or more processors according to a first memory access pattern, processing the data using the one or more processors to produce a second image, including storing intermediate second results of processing the data in the at least one internal memory of the one or more processors according to a second memory access pattern, wherein the second memory access pattern is different than the first memory access pattern, comparing the first image to the second image, and generating an interrupt if the comparison indicates that the first image is different than the second image.