GPU Compiler Memory Space Resolution for Faster Address Access
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Solution Overview
Problem
Conventional GPU compilers require costly run-time memory access operations to resolve memory space tags, wasting resources and preventing optimizations like memory access reordering and alias analysis.
Innovation Solution
A method for optimizing GPU program code by identifying memory access operations, ascending use-definition chains to determine specific memory spaces, and modifying the code to target those spaces, allowing for pre-run-time optimizations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If run-time tag reading is used to resolve memory space addresses, then memory access operations can be performed correctly in non-uniform memory architecture, but GPU resources are wasted and execution speed is reduced
Solution Approach 1:
The patent performs memory space resolution during compile-time code generation rather than at run-time. The compiler analyzes use-definition chains of pointers, traces their origins to specific memory spaces, and embeds the resolved memory space information directly into the generated machine code. This preliminary action eliminates the need for run-time tag reading, thereby resolving the contradiction between memory access correctness and GPU execution speed.
2Reliability
If run-time memory space resolution is used, then variables at the same address in different memory spaces are distinguishable, but compiler optimizations like memory access re-ordering and alias analysis are prevented
Solution Approach 1:
The patent performs memory space resolution during the compile-time code generation phase by analyzing use-definition chains and tracing pointer origins to specific memory spaces. The resolved memory space information is embedded into the generated machine code, allowing the compiler to perform optimizations such as memory access re-ordering and alias analysis before execution. This preliminary resolution enables both variable distinguishability and compiler optimizations, resolving the contradiction between reliability and productivity.
Data Source
AI summary
A device compiler and linker is configured to optimize program code of a co-processor enabled application by resolving generic memory access operations within that program code to target specific memory spaces. In situations where a generic memory access operation cannot be resolved and may target constant memory, constant variables associated with those generic memory access operations are transferred to reside in global memory.