Micro-coded Transcendental Instruction Execution in GPUs
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
SIMT processors face inefficiencies in resource utilization and power consumption when processing transcendental instructions, as they require significant hardware and resources without achieving comparable performance to conventional methods.
Innovation Solution
Implementing cubic interpolation and Horner evaluation of cubic polynomials within micro-code processing in GPUs, which reduces hardware requirements and power consumption while maintaining performance through iterative processing and micro-coded operation of shader data paths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional hardware structures are used for processing transcendental instructions in SIMT processors, then processing capability is maintained, but resource utilization efficiency deteriorates and power consumption increases
Solution Approach 1:
The patent uses microcode as a virtual copy of hardware logic to process transcendental instructions. Instead of implementing dedicated hardware circuits for each transcendental function (sin, cos, log, etc.), the system copies the processing logic into microcode form that can be executed by a general-purpose microcode interpreter, thereby reducing physical hardware resources while maintaining processing capability.
Solution Approach 2:
The patent changes the operational parameters of the processing system by switching from direct hardware circuit execution to microcode-based iterative processing. This parameter change allows the same processing function to be achieved with different resource characteristics - using software-like microcode instead of hardware circuits, which reduces power consumption at the cost of increased execution cycles.
2Speed
If dedicated hardware structures are implemented for transcendental instructions, then processing speed is maintained, but device complexity and resource requirements increase
Solution Approach 1:
The patent implements a universal microcode execution mechanism that can handle all types of transcendental instructions (sin, cos, tan, log, exp, etc.) through a single unified structure. Instead of having separate dedicated hardware circuits for each transcendental function, one microcode interpreter can execute any transcendental operation by loading the appropriate microcode routine, thereby reducing device complexity while maintaining multi-functionality.
Solution Approach 2:
The patent introduces microcode as an intermediary layer between the instruction set architecture and the execution units. The microcode acts as a mediator that translates high-level transcendental instructions into sequences of basic operations that can be executed by simple, general-purpose hardware, thereby reducing the complexity of the execution units while preserving processing capability.
3Device complexity
If microcode with iterative processing is used for transcendental instructions, then hardware requirements are reduced, but processing cycles increase
Solution Approach 1:
The patent segments transcendental function computation into multiple iterative microcode steps, breaking down complex mathematical operations into sequences of simpler operations (such as polynomial evaluation steps, lookup table accesses, and arithmetic operations). This segmentation allows the use of simple, general-purpose hardware that executes multiple instructions sequentially, reducing hardware complexity while achieving the desired computational result through divided processing steps.
Data Source
AI summary
A method for graphics processing includes generating one or more transcendental instructions in a graphics processing unit (GPU). Micro-code is formed for processing the one or more transcendental instructions in the GPU. The micro-code is processed using an iterative process including cubic interpolation and an evaluation of a cubic polynomial.