GPU On-Chip Memory for Virtual Scene Rendering Bandwidth Reduction

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Solution Overview

Problem

Current graphics processing units (GPUs) in mobile platforms face high bandwidth consumption and power usage due to frequent writing and reading operations with main memory during virtual scene rendering, particularly in tile-based rendering modes.

Innovation Solution

The GPU writes geometry rendering results into on-chip memory instead of main memory and reads them directly from on-chip memory during illumination rendering, using expansion characteristics to optimize data access, thereby reducing bandwidth consumption and power usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If the GPU writes geometry rendering results into main memory and reads them back during illumination rendering, then the rendering process can be completed with standard memory architecture, but bandwidth consumption and power usage increase significantly

Engineering Contradiction:
Improvepower consumptionVSAvoidmemory architecture complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent embeds an on-chip memory system within the GPU architecture, creating a nested memory hierarchy where on-chip memory is integrated into the GPU chip itself. This allows the geometry buffer to be stored locally on the GPU chip, eliminating the need for frequent main memory access and reducing power consumption while maintaining rendering functionality

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The patent introduces on-chip memory as an intermediary between the GPU processing units and main memory. This intermediary memory layer buffers geometry rendering results locally, allowing fast access during illumination rendering without requiring data transfer to and from main memory, thus reducing bandwidth consumption and power usage

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the GPU frequently writes and reads geometry buffer data with main memory, then data accessibility is ensured, but bandwidth consumption increases

Engineering Contradiction:
Improvedata accessibilityVSAvoidbandwidth consumption
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent performs preliminary writing of geometry rendering results into on-chip memory during the geometry rendering stage. This preliminary action ensures that the data is already available in fast on-chip memory before the illumination rendering stage begins, eliminating the need for subsequent read operations from main memory and reducing overall bandwidth consumption

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent segments the memory system into two distinct parts: on-chip memory for storing geometry buffer data and main memory for other system needs. This segmentation allows the geometry rendering data to be kept in the faster on-chip memory, ensuring data accessibility while reducing the bandwidth burden on main memory

Inventive Principle:
Principle #1Segmentation

3Power

If tile-based rendering mode is used in mobile GPUs, then power consumption is reduced compared to other rendering modes, but frequent main memory access still occurs causing high bandwidth consumption

Engineering Contradiction:
Improvepower consumptionVSAvoidrendering efficiency
Core Design Contradiction:
PowerVSProductivity

Solution Approach 1:

The patent merges the geometry buffer storage function with the on-chip memory of the GPU, combining two previously separate functions into one integrated system. This merging eliminates the need for separate memory access operations between the geometry and illumination rendering stages, improving rendering efficiency while maintaining the power-saving benefits of tile-based rendering

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20240371086A1Method and apparatus for rendering virtual scene, device, and storage medium
Publication Date: 2024.11.07 TENCENT TECHNOLOGY (SHENZHEN) CO LTD
  • US20240371086A1 patent drawing
  • US20240371086A1 patent drawing
  • US20240371086A1 patent drawing

AI summary

Embodiments of this application disclose a method for rendering a virtual scene performed by a computer device. The method includes: performing geometry rendering on the virtual scene at a geometry rendering stage, to obtain a geometry rendering result; writing the geometry rendering result into an on-chip memory in a GPU; reading the geometry rendering result from the on-chip memory based on an expansion characteristic in which the GPU reads data from the on-chip memory at an illumination rendering stage; performing illumination rendering based on light source information and the geometry rendering result, to obtain an illumination rendering result; and writing the illumination rendering result into the on-chip memory. By using the solutions provided in the embodiments of this application, in a rendering process, the geometry rendering result no longer needs to be stored in the main memory, thereby reducing bandwidth consumption.