Graphics Processor Power Reduction via Dynamic Clock and Voltage Control
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Solution Overview
Problem
Conventional power management techniques are ineffective in reducing power consumption in graphics processors during continuous 3D rendering, as they rely on idle periods that are not present in modern computing systems with continuous rendering requirements.
Innovation Solution
A method to control graphics processor clock speeds and voltage levels to match the frame rendering rate with the display refresh rate, using closed-loop control to minimize idle time and reduce power consumption, optionally applying a back bias voltage to further reduce power usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional power reduction techniques (shutting down components or reducing clock frequency during idle periods) are used, then power consumption is reduced during idle time, but these techniques become ineffective when continuous rendering prevents the graphics processor from ever being idle
Solution Approach 1:
The patent applies dynamics by making the graphics processor's operating state variable and adjustable in real-time. The system dynamically transitions between different operational modes (full performance, reduced performance, idle) based on actual workload requirements, allowing the processor to adapt its power consumption characteristics continuously rather than being fixed in one state
Solution Approach 2:
The patent changes key operating parameters including clock frequency, voltage levels, and performance mode to optimize power consumption. By adjusting these parameters dynamically according to actual rendering needs, the system achieves significant power savings while maintaining the ability to deliver full performance when required
2Manufacturing precision
If the graphics processor operates at full speed continuously to maintain high rendering quality, then image quality is preserved, but power consumption increases significantly
Solution Approach 1:
The patent applies partial action by operating the graphics processor at reduced performance levels when full rendering quality is not required. The system provides just enough processing power to meet the actual display requirements (e.g., matching frame rate to display refresh rate), avoiding the excessive power consumption of continuous full-speed operation while maintaining acceptable image quality
Solution Approach 2:
The patent implements periodic action by synchronizing the graphics processor's frame rendering rate with the display's refresh rate. Instead of continuous high-speed rendering, the processor operates in periodic bursts corresponding to display refresh cycles, reducing overall power consumption while maintaining visual quality
3Use of energy by moving object
If the frame rendering rate is limited to match the display refresh rate, then power consumption is reduced, but the graphics processor may still experience idle time between frames
Solution Approach 1:
The patent applies continuity of useful action by ensuring the graphics processor remains productively engaged during the entire frame interval. Instead of allowing idle time between rendered frames, the system keeps the processor working on preparation tasks, pre-processing, or other useful computations, eliminating wasted time and further reducing power consumption by avoiding complete idle states
Data Source
AI summary
A graphics processor may be operated in a reduced power mode to render frames at rate equal to or less than the rate at which frames are presented on an interconnected display. Graphics processor clock speeds are controlled to reduce the time during which the graphics processor is idle between rendering frames. The graphics processor clock speed may thus be slowed without impacting the quality of rendered images. At the same time the voltage applied to power the graphics processor may be reduced. Optionally, a back bias voltage may further be applied to the processor substrate to reduce power consumption. Clock speed and voltage levels may be adjusted using closed-loop control.


