GPU Shader Code Execution Ordering via Scoreboard Dependency Tracking

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Solution Overview

Problem

In digital image processing and graphics pipelines, instruction execution ordering can lead to unnecessary delays due to data dependencies, where instructions wait for the completion of other instructions, even if they can be executed independently.

Innovation Solution

The system identifies independent code segments that can start execution when their data is available, using a scoreboard to track dependencies and execute these segments out of order, allowing the graphics processing unit (GPU) to execute instructions based on data availability in registers or cache.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If instructions are executed in order to maintain simplicity of control, then device complexity is reduced, but execution speed decreases due to unnecessary waiting for data dependencies

Engineering Contradiction:
Improveinstruction execution speedVSAvoidcontrol mechanism complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The system performs preliminary analysis of instruction dependencies before execution, identifying independent code segments that can be executed out of order. The scoreboard is pre-configured with dependency information, allowing the execution unit to immediately execute ready instructions without waiting for data dependencies, thus improving execution speed while maintaining controlled complexity through pre-computed dependency information

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The instruction stream is segmented into independent code segments that can be executed autonomously. Each segment is identified and tracked separately using scoreboard mechanisms, allowing parallel execution of independent segments while maintaining simple control within each segment. This segmentation enables out-of-order execution without requiring complex global control mechanisms

Inventive Principle:
Principle #1Segmentation

2Productivity

If the system waits for data dependencies to maintain correctness, then reliability is improved, but productivity decreases due to execution stalls

Engineering Contradiction:
Improveinstruction execution throughputVSAvoiddata dependency correctness
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The scoreboard provides continuous feedback on the status of data dependencies and register availability. This feedback mechanism allows the execution unit to dynamically determine when independent code segments are ready to execute, ensuring data correctness is maintained while maximizing throughput by executing instructions as soon as their dependencies are satisfied

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

Dependency information is preliminarily analyzed and stored in the scoreboard before execution begins. This preliminary action allows the system to proactively identify when data will be available, eliminating the need to wait passively for dependencies to resolve and thereby maintaining both correctness and high productivity

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11966998B2Ordering of shader code execution
Publication Date: 2024.04.23 INTEL CORP
  • US11966998B2 patent drawing
  • US11966998B2 patent drawing
  • US11966998B2 patent drawing

AI summary

Examples described herein relate to a graphics processing apparatus that includes a memory device and a graphics processing unit (GPU). In some examples, the GPU is configured to execute a shader program that is to identify at least two code blocks that are independent from each other and cause execution of an unexecuted independent code block with available data based on use of a scoreboard to track data availability for independent code blocks. In some examples, execution of the shader program is to cause the GPU to select a first code block identifier for tracking completion of a dependency of the first independent code block. In some examples, execution of the shader program is to cause the GPU to identify an offset to a first instruction position in a sequence of instructions of the first independent code block in an instruction queue.