GPU Sparse Computation Mechanism for Skipping Zero-Value Operands
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Solution Overview
Problem
Current graphics processing units (GPUs) face inefficiencies in processing sparse matrices, leading to increased computational load due to handling zero-value operands and dense matrix computations, which can be optimized for better performance in applications like deep learning and neural networks.
Innovation Solution
Implementing a sparse matrix processing mechanism that includes a scheduler to identify and skip zero-value operands, a pattern tracker to detect sparse segments, and compression logic to store frequently used sparse matrices in a buffer for efficient execution, along with partitioning execution units to handle neural network layers effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If dense matrix computation is performed on sparse data, then computational load increases, but processing completeness is maintained
Solution Approach 1:
The patent extracts and processes only the non-zero elements from sparse matrices, separating them from the zero-value elements. The scheduler identifies non-zero operands and routes them to processing units, while zero-value operands are skipped entirely. This extraction principle eliminates unnecessary computations on zero elements, directly reducing computational load and energy consumption while maintaining processing efficiency for the actual data.
Solution Approach 2:
Instead of performing complete dense matrix multiplication on all elements, the patent applies partial action by computing only the necessary non-zero elements. The computation is performed partially on the sparse data structure, processing only the segments that contain actual information, thereby avoiding excessive computation on zero-padding elements and optimizing the productivity-energy tradeoff.
2Productivity
If sparse matrix processing optimizations are implemented, then processing efficiency improves, but system complexity increases
Solution Approach 1:
The patent segments the matrix processing task into distinct phases: identification of non-zero elements, scheduling of non-zero operands, compression of sparse matrices, and execution of computations. The scheduler is divided into components that handle different aspects of sparse data processing separately. This segmentation allows each component to be optimized independently while maintaining overall processing efficiency, managing system complexity through modular design.
Solution Approach 2:
The patent implements a unified sparse processing mechanism that can handle various sparse matrix operations (multiplication, addition, transformation) through a common architecture. The scheduler and compression logic serve multiple functions across different neural network operations and deep learning workloads. This multi-functionality improves processing efficiency across diverse applications while avoiding the complexity of implementing separate specialized processors for each operation type.
3Quantity of substance
If compression logic is added to store sparse matrices, then memory efficiency improves, but device complexity increases
Solution Approach 1:
The compression logic performs preliminary compression of sparse matrices before they are stored in memory or processed. By pre-compressing the data structure to eliminate zero-value elements and store only non-zero elements with their positions, the system reduces memory usage requirements in advance. This preliminary action prevents the need for large memory allocations and reduces the burden on the processing units, while the compression functionality is integrated into the existing processing pipeline to minimize additional complexity.
Data Source
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AI summary
A method and a data processing system for performing operations associated with a machine learning framework are disclosed. For example, the method comprises: loading elements of matrices into a first memory of a graphics processor of one or more processors, wherein the first memory is a global memory of the graphics processor, transferring a subset of elements of the matrices from the first memory into a second memory of the graphics processor, the second memory local to a set of processing resources of the graphics processor, and triggering execution of a compute kernel on the graphics processor, wherein the compute kernel performs a matrix multiply operation on the subset of elements of the matrices. The matrix multiply operation is associated with a convolution operation. The machine learning framework enables the compute kernel to specify one or more additional element-wise operations to perform on output of the matrix multiply before the output is transferred to the first memory, the one or more additional operations including applying an activation function to the output.