GPU State Error Injection Architecture for Resilience Assessment

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Solution Overview

Problem

Conventional methods for assessing the resilience of graphics processing units (GPUs) to soft errors, such as ionizing radiation, lack control over which memory circuits are affected and when, providing an inaccurate assessment of resilience during application execution.

Innovation Solution

A method for precise state error injection in GPUs, allowing for the emulation of soft errors by halting execution in a specified subsystem, injecting a state error at a specified data storage circuit or RAM bit, and resuming execution, using a programmable management unit and in-silicon fault injection circuit to assess resilience without disrupting the application.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If ionizing radiation is used to assess GPU resilience, then soft errors can be induced in memory circuits, but control over which memory circuits are affected and when is lost

Engineering Contradiction:
ImproveGPU resilience assessmentVSAvoiderror location and timing control
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent introduces an intermediary error injection mechanism between the radiation source and the memory circuits. Instead of directly using radiation to induce errors, the system uses controllable error injection circuits that can selectively flip specific bits in designated memory circuits at precisely controlled times, thereby maintaining both reliability assessment capability and measurement precision

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces the physical mechanical system of ionizing radiation with an electronic/software-based error injection system. The controllable error injection mechanism uses logical operations and control signals to induce errors, substituting the uncontrollable physical radiation process with a programmable electronic system that provides precise control over error location and timing

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If conventional fault injection methods are used, then soft errors can be induced, but accurate assessment of resilience during specific application execution is prevented

Engineering Contradiction:
Improveresilience assessment capabilityVSAvoidapplication execution continuity
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements preliminary action by pre-positioning error injection capabilities within the GPU architecture itself. The controllable error injection mechanism is prepared in advance and can be activated at specific points during application execution, allowing resilience assessment to be performed without disrupting the normal flow of application processing

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The GPU system performs self-diagnosis and self-assessment through the integrated controllable error injection mechanism. The system can autonomously induce errors in its own memory circuits during execution and evaluate its resilience, eliminating the need for external radiation equipment and maintaining application continuity while performing self-testing

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11275662B2Fault injection architecture for resilient GPU computing
Publication Date: 2022.03.15 NVIDIA CORP
  • US11275662B2 patent drawing
  • US11275662B2 patent drawing
  • US11275662B2 patent drawing

AI summary

Unavoidable physical phenomena, such as an alpha particle strikes, can cause soft errors in integrated circuits. Materials that emit alpha particles are ubiquitous, and higher energy cosmic particles penetrate the atmosphere and also cause soft errors. Some soft errors have no consequence, but others can cause an integrated circuit to malfunction. In some applications (e.g. driverless cars), proper operation of integrated circuits is critical to human life and safety. To minimize or eliminate the likelihood of a soft error becoming a serious malfunction, detailed assessment of individual potential soft errors and subsequent processor behavior is necessary. Embodiments of the present disclosure facilitate emulating a plurality of different, specific soft errors. Resilience may be assessed over the plurality of soft errors and application code may be advantageously engineered to improve resilience. Normal processor execution is halted to inject a given state error through a scan chain, and execution is subsequently resumed.