GPU Task Mapping for Regular Expression Matching
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Solution Overview
Problem
Adapting SIMD machines, such as GPUs, for parallel processing tasks like regular expression matching is challenging due to varying execution times and inefficiencies in handling branch operations.
Innovation Solution
Efficient task mapping to execution threads is achieved by using a system architecture that includes a string maintenance module, regex compiler, scheduler, and virtual machine on a GPU, employing bytecode execution and indicator variables to optimize processing, and dynamically managing execution cycles and thread allocation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If SIMD machines are used for parallel processing of regular expression matching, then processing throughput is improved, but execution time varies significantly across different threads
Solution Approach 1:
The patent applies preliminary action by pre-compiling regular expressions into bytecode before execution, and by pre-organizing string data into fixed-size blocks. This preparation work is done in advance to reduce execution time variations during actual pattern matching operations, allowing threads to process data more uniformly.
Solution Approach 2:
The patent implements dynamics through dynamic thread allocation and workload balancing mechanisms. The system dynamically adjusts which threads process which regex patterns based on current system state and performance metrics, allowing the processing system to adapt to varying execution requirements and minimize time variations.
2Speed
If parallel processing is implemented across multiple threads, then processing speed is improved, but branch operations become inefficient
Solution Approach 1:
The patent applies segmentation by dividing the regular expression matching process into distinct bytecode instructions that can be executed independently by multiple threads. Each thread processes segmented portions of the data with clearly defined control flow, reducing the complexity of branch operations across the parallel system.
Solution Approach 2:
The patent introduces an intermediary layer in the form of a virtual machine that executes bytecode instructions. This intermediary abstracts the complex branch operations from the underlying hardware, providing a simplified instruction set that is more amenable to parallel execution while maintaining the necessary control flow logic.
3Productivity
If more execution threads are allocated, then task completion rate is improved, but resource utilization becomes unbalanced
Solution Approach 1:
The patent implements feedback mechanisms that monitor thread execution progress and resource utilization in real-time. Based on this feedback, the system dynamically adjusts thread allocation and workload distribution to maintain balanced resource utilization while maximizing task completion rate, preventing both over-provisioning and under-provisioning of computational resources.
Data Source
AI summary
Tasks are mapped to execution threads of a parallel processing device. Tasks are mapped from the list of tasks to execution threads of the parallel processing device that are free. The parallel processing device is allowed to perform the tasks mapped to the execution threads of the parallel processing device for a predetermined number of execution cycles. When the parallel processing device has performed the tasks mapped to the execution threads of the parallel processing device for the predetermined number of execution cycles, the parallel processing device is suspended from further performing the tasks to allow the parallel processing device to determine which execution threads have completed performance of mapped tasks and are therefore free.