GPU Task Scheduling via ALU Work Fullness Counters

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current graphics processing units (GPUs) face inefficiencies in scheduling tasks due to ALU pipeline stalls and resource management, leading to performance drops when scheduled tasks are sent to ALUs at a rate faster than they can execute, resulting in task backlogs and scheduler stalls.

Innovation Solution

Implementing a method within the GPU that checks ALU work fullness counters to prevent overloading by deactivating and reactivating scheduled tasks based on ALU availability, using counters to monitor and manage ALU pipeline workload and prioritize tasks, ensuring efficient execution by updating counters when instructions are sent and removed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If scheduled tasks are sent to ALUs at a high rate to improve processing throughput, then productivity increases, but ALU pipeline stalls occur causing task backlogs and scheduler stalls

Engineering Contradiction:
Improvetask processing throughputVSAvoidpipeline stall prevention
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The system performs preliminary actions by checking the work fullness counter before sending instructions to the ALU. This preventive mechanism identifies when the ALU is full and deactivates scheduled tasks in advance, preventing pipeline stalls before they occur rather than reacting after stalls have happened.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements feedback by continuously monitoring the work fullness counter and using this information to control task activation. When the counter indicates the ALU is full, the scheduler deactivates tasks; when the counter shows capacity, tasks are reactivated. This closed-loop control ensures tasks are sent to the ALU at the correct rate.

Inventive Principle:
Principle #23Feedback

2Reliability

If the scheduler continuously monitors and manages task activation to prevent ALU overload, then pipeline stalls are reduced, but device complexity increases due to additional control logic

Engineering Contradiction:
Improvepipeline stall preventionVSAvoidscheduler control logic
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system achieves self-service by using the work fullness counter to automatically control task activation without complex external management. The counter itself provides the information needed for the scheduler to make decisions, eliminating the need for additional monitoring mechanisms or complex control logic.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The system manages complexity by changing the state parameter of tasks between active and inactive based on the work fullness counter value. This simple parameter change approach replaces complex scheduling algorithms, reducing control logic while maintaining reliable pipeline management.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If tasks are frequently deactivated and reactivated to match ALU capacity, then task scheduling efficiency improves, but power consumption increases due to unnecessary reactivation

Engineering Contradiction:
Improvetask scheduling efficiencyVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The system performs preliminary action by checking the work fullness counter before activating tasks. This prevents unnecessary task activation when the ALU is already full, reducing the frequency of deactivation-reactivation cycles and thereby lowering power consumption while maintaining scheduling efficiency.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20240160472A1Scheduling tasks using work fullness counter
Publication Date: 2024.05.16 IMAGINATION TECH LTD
  • US20240160472A1 patent drawing
  • US20240160472A1 patent drawing
  • US20240160472A1 patent drawing

AI summary

A method of activating scheduling instructions within a parallel processing unit includes checking if an ALU targeted by a decoded instruction is full by checking a value of an ALU work fullness counter stored in the instruction controller and associated with the targeted ALU. If the targeted ALU is not full, the decoded instruction is sent to the targeted ALU for execution and the ALU work fullness counter associated with the targeted ALU is updated. If, however, the targeted ALU is full, a scheduler is triggered to de-activate the scheduled task by changing the scheduled task from the active state to a non-active state. When an ALU changes from being full to not being full, the scheduler is triggered to re-activate an oldest scheduled task waiting for the ALU by removing the oldest scheduled task from the non-active state.