GPU Tessellation Tiling Order Control for Bandwidth Reduction
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Solution Overview
Problem
Graphics Processing Units (GPUs) face increased data bandwidth and power consumption due to the need to read and write extensive data during tessellation operations, which can be inefficient when performing tiling operations before or after tessellation.
Innovation Solution
A method and system where the order of tessellation and tiling operations are determined based on input data, with a pre-tiler performing tiling before tessellation when the patch geometry is inside the convex hull and unchanged, and a post-tiler performing tiling after tessellation when the patch geometry is outside the convex hull or changed by shading operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the GPU performs tessellation operation and stores data in external memory, then the image rendering can proceed, but the data bandwidth increases and power consumption increases
Solution Approach 1:
The patent applies preliminary action by performing tiling operation before tessellation operation in certain cases. By determining the geometry characteristics of input patches beforehand and deciding to tile first, the system prepares data in advance in a compact format, reducing the amount of data that needs to be transferred to external memory during subsequent tessellation operations, thereby reducing power consumption while ensuring rendering completion
2Productivity
If the GPU reads and writes extensive data for tessellation operation, then the tessellation processing can be completed, but the data bandwidth increases
Solution Approach 1:
The patent applies preliminary action by performing tiling operation before tessellation operation when patch geometry is inside the convex hull and unchanged by shading. This preliminary tiling organizes and compactes the data before tessellation processing, reducing the volume of data that needs to be read from and written to external memory, thereby reducing data bandwidth requirements while maintaining tessellation processing completion
Solution Approach 2:
The patent applies parameter changes by dynamically changing the operation order based on geometric parameters. The control logic evaluates parameters such as whether the patch geometry is inside or outside the convex hull and whether shading operations will change the geometry, and adjusts the tiling/tessellation order accordingly, optimizing data bandwidth usage for different geometric scenarios
3Loss of energy
If the GPU performs tiling operation before tessellation operation, then the data bandwidth and power consumption are reduced, but the operation order must be determined correctly based on input data
Solution Approach 1:
The patent applies parameter changes by using geometric parameters of the input data to determine the operation order. The control logic evaluates specific parameters such as whether the patch geometry lies inside the convex hull defined by control points and whether shading operations will alter the geometry, and based on these parameter evaluations, selects the appropriate operation sequence, thereby managing the complexity through systematic parameter-based decision making
Solution Approach 2:
The patent applies segmentation by dividing the processing into distinct operational paths. The control logic segments the operation flow into different branches: one path for when tiling should precede tessellation (when geometry is inside convex hull and unchanged), and another path for when tessellation should precede tiling (when geometry is outside convex hull or will change). This segmentation simplifies the complexity by creating clear, condition-based decision branches
Data Source
AI summary
A method of operating a graphics processing unit includes determining, based on input data, whether to perform a tiling operation before or after a tessellation operation and performing the tiling operation according to the determination result. Performing the tiling operation after the tessellation operation if the input data is not a patch, and if a geometry of the patch is at the out-side of a convex hull defined by control points of the patch. Performing the tiling operation after the tessellation operation if a geometry of a tessellated primitive corresponding to the patch changes according to a shading operation.