GPU Tiled Image Data Conversion for CPU Readback

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Solution Overview

Problem

Current digital image processing systems face inefficiencies in accessing and storing digital image data, particularly when converting contiguous interleaved image data for use between graphics processing units (GPUs) and central processing units (CPUs, as existing methods require costly 'lock for write' operations and sequential access to planar tiles, which can lead to computational expense and memory bottlenecks.

Innovation Solution

The conversion of contiguous interleaved image data into a tiled format, specifically a tiled planar or tiled interleaved format, is achieved using a GPU that executes shader programs like pixel shaders, allowing for parallel lock operations and efficient data copying, thereby optimizing data access and storage for image editing programs running on CPUs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If contiguous interleaved image data is converted using traditional CPU methods with lock for write operations, then data can be accessed and stored, but computational expense increases and memory bottlenecks occur

Engineering Contradiction:
Improveimage data processing speedVSAvoidcomputational expense
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent introduces a buffer memory as an intermediary component between the GPU and CPU. The buffer memory stores the contiguous interleaved image data and enables efficient data transfer and format conversion without requiring costly lock operations. This intermediary buffer allows the GPU to write data in its native format while the CPU reads converted formats, eliminating the need for synchronized access control and reducing computational overhead.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent implements data copying from the buffer memory to different memory locations in various formats (contiguous interleaved, tiled planar, tiled interleaved) without requiring lock operations. By pre-storing data in multiple formats in the buffer, the system avoids repeated conversion operations and expensive CPU-GPU synchronization, significantly reducing computational expense while maintaining high productivity.

Inventive Principle:
Principle #26Copying

2Reliability

If lock for write operations are used for data access, then data integrity is maintained, but memory access costs increase

Engineering Contradiction:
Improvedata integrityVSAvoidmemory access costs
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent segments the image data into different format representations (contiguous interleaved, tiled planar, tiled interleaved) and stores them separately in buffer memory. This segmentation allows different processing units to access data in their preferred format without interfering with each other, eliminating the need for lock operations while maintaining data integrity. Each segment can be independently accessed by appropriate processors.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The buffer memory acts as an intermediary that decouples the GPU and CPU memory access operations. By storing data in multiple formats within the buffer, the system allows simultaneous or sequential access without synchronization overhead, maintaining data integrity while reducing memory access costs through eliminated lock operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of operation

If sequential access to planar tiles is used, then data can be read by image editing programs, but processing efficiency decreases

Engineering Contradiction:
Improvedata accessibilityVSAvoidprocessing efficiency
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The patent provides dynamic data access by storing image data in multiple formats (contiguous interleaved, tiled planar, tiled interleaved) within the buffer memory. Image editing programs can dynamically select the most appropriate format based on their specific needs, enabling both sequential access when required and parallel access when beneficial, thereby improving processing efficiency while maintaining ease of operation.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the data organization parameters by providing the same image data in multiple format representations. By converting and storing data in different formats (interleaved vs. planar, contiguous vs. tiled), the system optimizes for different access patterns, allowing image editing programs to efficiently process data based on their specific requirements without being constrained to sequential access only.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8810587B2Conversion of contiguous interleaved image data for CPU readback
Publication Date: 2014.08.19 ADOBE INC
  • US8810587B2 patent drawing
  • US8810587B2 patent drawing
  • US8810587B2 patent drawing

AI summary

A method, system, and computer-readable storage medium are disclosed for conversion of contiguous interleaved image data. Image data in a contiguous interleaved format is received at a graphics processing unit (GPU). The GPU generates converted image data in a tiled format based on the image data in the contiguous interleaved format. The GPU sends the converted image data in the tiled format to a central processing unit (CPU).