Chip-to-Chip Video Bus for GPU Noise Mitigation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
High-volume graphics processing unit (GPU) devices face significant noise-related degradation in analog video output signals due to on-chip noise coupling, which becomes more pronounced with increasing logic integration, making existing noise mitigation strategies less effective.
Innovation Solution
Decoupling noise sources from analog video output circuitry by moving the analog circuitry to a separate device and using a chip-to-chip video bus with a host interface and target interface, transmitting 40 bits of data per clock cycle through 20 differential pairs, effectively reducing noise interference and pin count costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If more logic gates are integrated into the GPU, then processing capability is improved, but on-chip noise increases and couples into the analog video output port
Solution Approach 1:
The patent extracts the analog video output port and its associated circuitry from the GPU chip and relocates it to a separate device. This physical separation removes the harmful noise coupling path between the logic gates and the analog circuitry, allowing the GPU to integrate more logic gates without suffering from increased noise in the analog video output.
2Device complexity
If analog video output port is kept on the GPU, then design simplicity is maintained, but noise mitigation becomes progressively less effective
Solution Approach 1:
The patent extracts the analog video output port from the GPU and places it in a separate device, which fundamentally improves noise mitigation effectiveness by eliminating the noise coupling path. This is preferable to keeping it on the GPU where noise mitigation would become progressively less effective as more logic is integrated.
Solution Approach 2:
The patent introduces a separate device as an intermediary between the GPU and the display device. This intermediary device houses the analog video output port and its circuitry, acting as a buffer that isolates the noisy GPU logic from the sensitive analog circuitry, thereby maintaining reliable noise mitigation.
3Object-affected harmful factors
If analog circuitry is physically separated from switching logic, then noise coupling is reduced, but die area increases
Solution Approach 1:
The patent extracts the analog video output port and its circuitry from the GPU die and relocates it to a separate device. This extraction eliminates noise coupling while avoiding the need to increase die area on the GPU itself, as the separated components reside on a different substrate entirely.
4Object-affected harmful factors
If on-chip metal barriers are used to shield analog circuitry, then some noise is blocked, but inductively coupled noise penetrates the shields
Solution Approach 1:
The patent extracts the analog video output port from proximity to switching logic and places it in a separate device. This physical extraction is fundamentally more effective than on-chip metal barriers, as it eliminates the coupling path entirely and prevents inductively coupled noise from penetrating any potential shields.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively mitigates noise-related issues in analog video signals and allows GPUs to adopt new processor technology without redesigning the video encoder unit, while minimizing pin count and design effort.
Implementation Method 1
a data bus coupling the host interface to the target interface and including a host data path that comprises twenty differential pairs for transmitting twenty bits of data
Data Source
AI summary
One embodiment of the present invention sets forth a protocol for packing and transferring pixel data between integrated circuits. The data transfer protocol may be used between a graphics processing unit and a video output encoder unit. The data transfers may include up to 20 pixels per arbitration cycle. By packing pixel data for transfer over a bus with a relatively small set of output pins, overall package pin count is reduced, while maintaining sufficient bandwidth to carry the pixel data the output pins. By moving the analog circuitry to a separate device, linked to the GPU via the bus, noise from the GPU may be effectively mitigate through physical separation.