GPU Cluster Scheduling for Real-Time Wafer Defect Detection

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Solution Overview

Problem

Current wafer defect detection methods, particularly those relying on CPU-based devices, struggle with real-time processing efficiency and capacity as production volumes increase, leading to low detection efficiency and high labor intensity in semiconductor manufacturing.

Innovation Solution

A distributed system utilizing a GPU cluster for wafer defect detection, where a resource manager node allocates tasks to work nodes with GPUs, optimizing resource utilization and improving throughput through a customized scheduling algorithm, enabling real-time processing of large volumes of wafer maps.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If CPU-based devices are used for wafer defect detection, then the system structure is simple, but the detection efficiency is low and cannot meet real-time requirements

Engineering Contradiction:
Improvedetection efficiencyVSAvoidsystem complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the detection system into multiple work nodes, each equipped with GPUs for parallel processing. This segmentation enables the system to handle large volumes of wafer maps simultaneously, significantly improving detection efficiency while distributing the computational load across multiple independent units.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from single-CPU sequential processing to multi-GPU parallel processing architecture. By introducing the dimension of parallel computation through GPU clusters, the system achieves real-time detection capabilities without proportionally increasing overall system complexity through modular design.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If more wafer maps are detected every day, then the production capacity improves, but the current device is limited in detection capability

Engineering Contradiction:
Improvenumber of wafer maps detectedVSAvoiddetection capability
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The patent merges multiple GPU resources into a unified detection system managed by a central resource manager. This merging of computational resources allows the system to process a large quantity of wafer maps simultaneously, overcoming the limitations of individual CPU-based devices while maintaining coordinated control.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent creates a universal detection platform where work nodes with GPUs can handle various wafer detection tasks. This multi-functional architecture enables the system to scale its detection capability proportionally with the number of work nodes, accommodating increasing production volumes flexibly.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12085916B2Method and device for processing wafer detection tasks, system, and storage medium
Publication Date: 2024.09.10 CHANGXIN MEMORY TECH INC
  • US12085916B2 patent drawing
  • US12085916B2 patent drawing
  • US12085916B2 patent drawing

AI summary

A method and device for processing wafer detection tasks, a system, and a storage medium. The method includes that: the resource manager node receives the wafer detection task from the storage server, selects the target work node from the plurality of work nodes according to weight values of the work nodes connected to the resource manager node, and allocates the wafer detection task to the target work node. The target work node selects the idle GPU from the resource pool and allocates the wafer detection task to the idle GPU for execution. The GPU preprocesses the wafer map in the wafer detection task and inputs the processed wafer map into the wafer detection model to obtain the detection result.