Warp Scheduler Scoreboard for GPU Load/Store Unit Utilization
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Solution Overview
Problem
Current scheduling methods for multiple thread groups in GPU-based systems are inefficient, leading to increased program execution time due to inadequate utilization of the load/store unit and memory bandwidth bottlenecks in parallel computing applications.
Innovation Solution
A scheduling method and processing device that maintain a scoreboard to track the execution state of each thread group, monitor the availability of the load/store unit, and prioritize data access thread groups for immediate dispatch when the unit is available, ensuring optimal resource utilization and reducing idle time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If current scheduling methods are used for multiple thread groups, then the system can maintain simple scheduling logic, but the load/store unit utilization rate is low and program execution time increases
Solution Approach 1:
The patent applies preliminary action by maintaining a scoreboard that pre-records the execution states and next instructions of all thread groups before scheduling decisions are made. This advance preparation of thread group information allows the warp scheduler to quickly identify ready thread groups and prioritize data access operations, thereby reducing program execution time without significantly increasing scheduling complexity.
Solution Approach 2:
The patent implements feedback mechanisms through the scoreboard system that continuously tracks and updates the execution states of thread groups. The load/store unit availability monitoring provides feedback to the warp scheduler, which adjusts scheduling decisions based on real-time resource availability. This feedback loop optimizes load/store unit utilization by dynamically prioritizing data access thread groups when the unit is available.
2Productivity
If the load/store unit is monitored and data access thread groups are prioritized, then the load/store unit utilization rate increases, but the scheduling system complexity increases
Solution Approach 1:
The patent applies segmentation by dividing thread groups into different categories based on their execution states and instruction types. The scoreboard segments thread group information into ready states, next instructions, and priority levels. This segmentation allows the warp scheduler to efficiently identify and prioritize data access thread groups without requiring complex monolithic scheduling logic, thus increasing load/store unit utilization while managing system complexity.
Solution Approach 2:
The patent introduces the scoreboard as an intermediary between thread group execution states and the warp scheduler. The scoreboard acts as a mediator that pre-processes and organizes thread group information, making it easier for the scheduler to make informed decisions. This intermediary structure simplifies the scheduling process while enabling sophisticated prioritization of data access operations, thereby improving load/store unit utilization without proportionally increasing overall system complexity.
3Productivity
If thread groups are dispatched based on load/store unit availability, then memory bandwidth bottlenecks are mitigated, but the scheduling overhead increases
Solution Approach 1:
The patent applies preliminary action by pre-recording all necessary thread group execution state information in the scoreboard before scheduling decisions are made. This includes storing next instructions and ready states in advance, so that when scheduling is needed, the information is already prepared and immediately available. This eliminates the need for time-consuming queries during scheduling, thereby reducing scheduling overhead while enabling effective prioritization of data access operations to mitigate memory bandwidth bottlenecks.
Data Source
AI summary
A scheduling method is provided. The method includes: recording a next instruction and a ready state of each thread group in a scoreboard; determining whether there is any ready thread group whose ready state is affirmative; determining whether a load/store unit is available, wherein the load/store unit is configured to access a data memory unit; when the load/store unit is available, determining whether the ready thread groups include a data access thread group, wherein the next instruction of the data access thread group is related to accessing the data memory unit; selecting a target thread group from the data access thread groups; and dispatching the target thread group to the load/store unit for execution.