GPU Wavefront Scheduling Modes for Cache Thrashing Reduction
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Solution Overview
Problem
In graphics processing units (GPUs), scheduling instructions for wavefronts with a number of work-items that exceeds the number of execution units is challenging, leading to inefficiencies in processing and potential cache thrashing.
Innovation Solution
Implementing two operating modes in the GPU: one where instructions are executed on multiple portions of a wavefront before moving to the next instruction, and another where instructions are executed on one portion of the wavefront before moving to the next, with dynamic mode switching based on cache miss rates and register usage analysis to optimize performance and resource utilization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the number of work-items in a wavefront exceeds the number of execution units, then parallel processing capacity is underutilized, but instruction scheduling becomes challenging and cache thrashing occurs
Solution Approach 1:
The wavefront is divided into multiple portions (e.g., first portion and second portion) based on the number of execution units. Each portion is processed independently through separate instruction scheduling phases, allowing the system to handle larger wavefronts without overwhelming the execution units. This segmentation resolves the contradiction by enabling higher productivity through larger wavefronts while managing scheduling complexity through structured division.
Solution Approach 2:
The system dynamically switches between different operating modes (first operating mode and second operating mode) based on the wavefront size and execution unit capacity. In the first mode, instructions are executed on multiple portions simultaneously; in the second mode, instructions are executed sequentially on portions. This dynamic adaptation allows the system to optimize scheduling complexity based on current workload conditions while maintaining high productivity.
2Productivity
If instructions are executed on multiple portions of the wavefront before moving to the next instruction, then resource utilization is optimized, but cache thrashing increases
Solution Approach 1:
The system incorporates feedback mechanisms to monitor cache performance and adjust the operating mode accordingly. When cache thrashing is detected during execution of instructions on multiple portions, the system can switch to an alternative mode that processes instructions sequentially on portions, reducing cache misses while maintaining resource utilization efficiency. This feedback loop resolves the contradiction by adapting to actual cache behavior.
Solution Approach 2:
The system changes execution parameters (such as the order of instruction execution and the grouping of wavefront portions) based on workload characteristics and cache performance. By dynamically adjusting these parameters between different operating modes, the system optimizes resource utilization while minimizing cache thrashing, resolving the contradiction between productivity and energy loss.
3Speed
If the GPU executes all work-items in a wavefront simultaneously, then processing speed is maximized, but the number of execution units becomes a bottleneck
Solution Approach 1:
The wavefront is segmented into multiple portions that can be processed in different phases. The system executes instructions on multiple portions simultaneously when execution units are available, then progresses to the next instruction phase. This segmentation allows the system to maximize processing speed by utilizing all execution units efficiently while avoiding the bottleneck of attempting to process the entire wavefront as a single monolithic unit.
Solution Approach 2:
The execution process follows a periodic pattern where instructions are executed on multiple portions, then the system transitions to the next instruction phase for all portions. This periodic action allows the system to maintain high processing speed by continuously executing instructions on available portions while managing the execution unit capacity constraints through rhythmic phases of computation and coordination.
Data Source
AI summary
A system includes a processor configured to operate in at least a first mode and a second mode. In the first mode the first processor operates to execute an instruction for an entire wavefront before executing a next instruction for the entire wavefront. In the second mode the processor operates to execute a set instructions for a portion of a wavefront before executing the set instructions for another portion of the same wavefront. The system further includes a memory coupled to the processor. The memory is configured to store a shader program for execution by the processor, wherein the shader program includes at least one indication associated with one of the first mode or the second mode. The processor is further to implement one of the first mode or the second mode while executing the shader program responsive to the at least one indication present in the first shader program.