Graded Barrier Heterojunction Structure for Higher 2DEG Mobility
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Solution Overview
Problem
Transistors using silicon carbide, Aluminum Nitride, Zinc Oxide, and Gallium Nitride semiconductor materials face limitations in current flow and power efficiency due to fixed composition barrier layers, which restrict the formation of high electron mobility 2DEG regions, leading to increased on-resistance and heat generation.
Innovation Solution
A heterojunction structure is developed where the barrier semiconductor layer is epitaxially grown with varying element composition, enhancing free electron density and mobility in the 2DEG region, allowing for greater current flow and reduced on-resistance by adjusting the Aluminum content linearly or non-linearly across the epitaxial depth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a fixed composition barrier layer is used, then the manufacturing process is simple, but the electron mobility and current flow are limited
Solution Approach 1:
The patent applies parameter changes by varying the composition of the barrier layer (e.g., AlGaN alloy composition) during epitaxial growth. By changing the aluminum content or other compositional parameters across the barrier layer thickness, the patent optimizes the 2DEG electron mobility and current flow characteristics while maintaining manufacturing feasibility through controlled epitaxial processes.
2Device complexity
If a fixed composition barrier layer is used, then the device structure is simple, but the on-resistance is high
Solution Approach 1:
The patent reduces on-resistance by changing the compositional parameters of the barrier layer during epitaxial growth. By optimizing the alloy composition (e.g., varying Al content in AlGaN) across the barrier layer, the patent enhances 2DEG formation and electron mobility, thereby reducing channel resistance and energy loss while maintaining a relatively simple heterostructure design.
3Ease of manufacture
If a fixed composition barrier layer is used, then the fabrication process is straightforward, but heat generation is increased
Solution Approach 1:
The patent reduces heat generation by optimizing the barrier layer composition during epitaxial growth. By varying the compositional parameters (e.g., alloy composition, layer thickness) of the barrier layer, the patent improves power efficiency and reduces resistive heating in the transistor, while maintaining a fabrication process that is still based on standard epitaxial techniques.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases electron mobility and reduces on-resistance, improving power efficiency and minimizing heat generation in transistors, while maintaining strain and piezoelectric contributions.
Implementation Method 1
a barrier semiconductor layer epitaxially deposited on the channel semiconductor layer to form a heterojunction
Implementation Method 2
the joined bandgap drops below the Fermi level just within the channel layer. This means that electrons may freely flow within this region. This region is thin in depth and forms a plane parallel to the upper surface of the channel region. Thus, this region is called a '2 DEG' region to emphasize its planar form.
Data Source
AI summary
A heterojunction structure in which a barrier semiconductor layer is epitaxially grown on a channel semiconductor layer but varying a composition of the barrier semiconductor layer for at least part of the epitaxial growth of the barrier semiconductor layer. By so doing, in some cases, a free electron density in planar view of the 2 DEG may be increased thereby allowing for greater current flow for a given voltage difference. Furthermore, for a given current, the mobility of the electrons is increased, thus reducing the on resistance of transistors that include the 2 DEG as a channel region. This further improves power efficiency of the transistor, and reduces heat generated by the transistor at a given power.