Graded Body Doping LDMOS Device for Reverse Recovery Optimization
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Solution Overview
Problem
Conventional LDMOS devices have a gradual or uniform p-type body doping profile, leading to prolonged minority carrier storage and increased reverse recovery charge (Qrr), which deteriorates power conversion efficiency and can cause thermal failure, especially at high switching frequencies.
Innovation Solution
Implementing a graded body doping profile with a boron dopant gradient of at least 5×/μm in the vertical direction, achieved through a new p-buried layer process where high-energy boron implants are performed after significant thermal steps, resulting in a steep doping gradient that accelerates minority carrier extraction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a gradual or uniform p-type body doping profile is used in conventional LDMOS devices, then the manufacturing process is simpler and more established, but the reverse recovery time is prolonged and power conversion efficiency deteriorates
Solution Approach 1:
The patent changes the doping concentration parameter from uniform to graded, creating a vertical gradient where the p-type body doping concentration varies from approximately 1×10^17 cm^-3 at the surface to 1×10^18 cm^-3 at the bottom. This parameter change reduces minority carrier storage time and reverse recovery charge while maintaining manufacturing feasibility through established ion implantation and thermal processing techniques.
2Device complexity
If a gradual or uniform p-type body doping profile is used, then the device structure is simpler, but minority carrier storage time increases leading to increased reverse recovery charge
Solution Approach 1:
The patent applies local quality by creating different doping concentrations at different vertical positions within the body region. The graded doping profile provides higher doping concentration near the drain junction to accelerate minority carrier extraction and reduce reverse recovery time, while maintaining lower concentration at the surface to preserve other device characteristics.
3Manufacturing precision
If high energy boron implants are performed before thermal steps, then the doping profile can be established earlier in the process, but the dopant diffuses excessively during thermal processing resulting in a gradual profile
Solution Approach 1:
The patent performs the high energy boron implantation after the majority of thermal processing steps are complete, rather than before. This preliminary action of establishing the doping profile late in the process prevents excessive diffusion during thermal processing, allowing the creation of a steep graded profile that maintains manufacturing precision while controlling the duration of dopant diffusion.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The graded body doping profile significantly reduces reverse recovery time, improves switching efficiency, and enhances the safe operating area of LDMOS devices by efficiently sweeping minority carriers, thereby reducing power loss and parasitic NPN activation.
Implementation Method 1
high energy (near-MeV or MeV) p-type (e.g., boron) buried layer (PBL) implant
Implementation Method 2
subsequent high temperature furnace processing, and as a result diffuses the as-implanted largely Gaussian boron dopant profile in the vertical direction
Data Source
AI summary
A laterally diffused MOS (LDMOS) device includes a substrate having a p-epi layer thereon. A p-body region is in the p-epi layer. An ndrift (NDRIFT) region is within the p-body region providing a drain extension region, and a gate dielectric layer is formed over a channel region in the p-body region adjacent to and on respective sides of a junction with the NDRIFT region, and a patterned gate electrode on the gate dielectric. A DWELL region is within the p-body region, sidewall spacers are on sidewalls of the gate electrode, a source region is within the DWELL region, and a drain region is within the NDRIFT region. The p-body region includes a portion being at least one 0.5 μm wide that has a net p-type doping level above a doping level of the p-epi layer and a net p-type doping profile gradient of at least 5/μm.