Thin Film Transistor Graded Impurity Profile for Leakage Photocurrent
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Solution Overview
Problem
Existing semiconductor devices in liquid crystal displays face issues with leakage photocurrent, especially under low temperature processes, leading to high power consumption and increased resistance in the source/drain region, which affects image quality and efficiency.
Innovation Solution
The semiconductor device employs a thin semiconductor film with specific impurity concentration gradients and thickness control, combined with a lightly doped drain structure, to reduce leakage photocurrent and enhance breakdown voltage, while maintaining low resistance and efficient activation of impurities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If the semiconductor film is made thinner to reduce leakage photocurrent, then leakage photocurrent is reduced, but contact resistance increases due to over-etching removing the semiconductor film at the bottom of contact holes
Solution Approach 1:
The patent applies local quality by creating a graded impurity concentration distribution within the semiconductor film, where the impurity concentration varies with depth. Specifically, the impurity concentration is higher near the substrate interface and lower near the surface, which provides better etch resistance at the contact hole bottom while maintaining the thin film structure for reduced photocurrent. This localized variation in material properties resolves the contradiction between thin film requirements and etch resistance requirements.
Solution Approach 2:
The patent changes the parameter of impurity concentration distribution from uniform to graded. By controlling the impurity concentration to increase toward the substrate interface, the semiconductor film achieves optimized etch resistance at critical locations without increasing overall film thickness. This parameter change allows the thin film to maintain both low photocurrent generation and sufficient etch resistance during contact hole formation.
2Ease of manufacture
If a low temperature process is used with glass substrate to reduce cost, then manufacturing cost is reduced, but impurity activation is insufficient leading to high resistance in source/drain region
Solution Approach 1:
The patent changes the parameter of impurity concentration distribution to compensate for insufficient impurity activation in low temperature processes. By creating a graded distribution with higher concentration near the substrate interface, the patent ensures adequate carrier concentration and conductivity in the source/drain regions even when complete impurity activation cannot be achieved due to temperature constraints. This allows cost-effective low temperature processing while maintaining acceptable electrical characteristics.
3Object-affected harmful factors
If impurity concentration is increased to reduce resistance, then resistance is reduced, but leakage photocurrent increases
Solution Approach 1:
The patent applies local quality by spatially varying the impurity concentration within the semiconductor film thickness. The graded distribution provides higher impurity concentration near the substrate interface where etch resistance and conductivity are needed, while maintaining lower concentration near the surface where photocurrent generation occurs. This localized differentiation resolves the contradiction between reducing resistance and minimizing leakage photocurrent.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively restricts leakage photocurrent, reduces power consumption, and improves image quality by optimizing the impurity concentration and film thickness, ensuring high breakdown voltage and low resistance in the source/drain regions.
Implementation Method 1
Since a semiconductor such as polycrystalline silicon generates optical excitation due to incident light, if light from the backlight unit is incident upon the TFT, leakage photocurrent is generated by optically excited carriers.
Implementation Method 2
The TFT is formed by implanting impurities on patterned polycrystalline silicon on a supporting substrate such as glass or the like so as to form a source region (electrode) or a drain region (electrode), and then performing an annealing process to activate the impurities.
Data Source
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AI summary
A semiconductor device includes a supporting substrate; a semiconductor film on the supporting substrate; a gate insulating film on the semiconductor film; a gate electrode on the gate insulating film; and a source region and a drain region formed by introducing impurity elements to the semiconductor film. The thickness of the semiconductor film is within the range of 20nm to 40nm. Low-concentration regions are provided between the source region and a channel forming region, and between the drain region and the channel forming region, respectively. The low-concentration regions each have an impurity concentration smaller than that of the source region and that of the drain region, and the impurity concentration in a lower surface side region on the side of the supporting substrate is smaller than that of an upper surface side region on the opposite side.