Graded Lithographic Mask Tapered Edges
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Solution Overview
Problem
Conventional lithography masks struggle with achieving high resolution and uniformity in semiconductor device fabrication, particularly at smaller feature sizes, due to limitations in pattern transfer and increased susceptibility to patterning errors and longer mask write/fabrication times.
Innovation Solution
A lithography mask with a transparent substrate and a radiation attenuating layer featuring tapered edges with graded transmissivity is developed, achieved through wet etching and patterned resist layers, allowing for improved radiation exposure and uniform taper formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional lithography masks are used with smaller and denser patterns, then reduced feature sizes can be achieved, but patterning errors increase and mask fabrication time increases
Solution Approach 1:
The patent applies local quality by creating a gray scale mask where different regions of the mask have different optical properties. Specifically, the mask includes a first region with a first gray scale value and a second region with a second gray scale value, allowing different areas to have optimized characteristics for their specific patterning needs. This enables reduced feature sizes in critical areas while maintaining reliability in other regions.
Solution Approach 2:
The patent changes the optical parameters of the mask by using multiple gray scale values (transmission rates) in different regions. The mask includes regions with first, second, and third gray scale values, where each region has a different transmission rate for the actinic radiation. This parameter variation allows optimization of both resolution and error reduction in different mask areas.
2Manufacturing precision
If conventional lithography masks are used with smaller and denser patterns, then reduced feature sizes can be achieved, but mask fabrication time increases
Solution Approach 1:
The patent applies preliminary action by pre-defining multiple gray scale regions in the mask design before fabrication. The mask is configured with predetermined first, second, and third regions having different gray scale values, which are established during mask manufacturing. This preliminary configuration eliminates the need for time-consuming iterative adjustments during the lithography process, reducing overall fabrication time while maintaining precision.
3Measurement precision
If gray scale mask with multiple regions is used, then resolution is improved, but mask complexity increases
Solution Approach 1:
The patent manages mask complexity by applying local quality principles - each gray scale region is designed with specific transmission characteristics tailored to its function. The mask includes a first region with first gray scale value, second region with second gray scale value, and third region with third gray scale value, where each region's complexity is optimized for its specific patterning requirements rather than making the entire mask uniformly complex.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances process integration, reduces patterning errors, and enables more efficient plasma etching, resulting in improved resolution and uniformity for semiconductor device fabrication, particularly in smaller node sizes.
Implementation Method 1
the radiation attenuating layer has tapered edges wherein the tapered edges have a graded radiation transmissivity
Implementation Method 2
The tapered edges are formed by wet etching the radiation attenuating layer
Data Source
AI summary
In one aspect there is provided a gray scale lithographic mask that comprises a transparent substrate and a metallic layer located over the substrate, wherein the metallic layer has tapered edges with a graded transparency. The lithographic mask, along with etching processes may be used to transfer a pattern 450a into a layer of a semiconductor device.