Graded Impurity Source Drain Regions in Semiconductor Devices

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Solution Overview

Problem

Conventional methods for reducing contact resistance in high electron mobility transistors (HEMT) lead to a decrease in throughput due to the use of metal organic chemical vapor deposition (MOCVD) for forming n+GaN layers, which results in higher contact resistance when source and drain electrodes are formed on high concentration impurity layers grown by sputtering.

Innovation Solution

The semiconductor device employs a layered structure with source and drain regions formed using a sputtering method, where the concentration of electrically conductive impurities is strategically graded to prevent impurity precipitation and nitrogen compound formation, maintaining lower impurity concentrations in the second source and drain regions compared to the first regions, thereby reducing contact resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If MOCVD method is used to form n+GaN layer with high concentration impurity, then contact resistance is reduced, but throughput decreases

Engineering Contradiction:
Improvecontact resistanceVSAvoidthroughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent changes the deposition method from MOCVD to sputtering, and adjusts the impurity concentration parameters in the source and drain regions. By forming a first source/drain region with high impurity concentration and a second source/drain region with lower impurity concentration, the patent optimizes both contact resistance and throughput performance

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The source and drain regions are divided into two distinct regions: a first source/drain region with high impurity concentration and a second source/drain region with lower impurity concentration. This segmentation allows each region to serve different functions - the first region provides strong electrical contact while the second region prevents impurity precipitation

Inventive Principle:
Principle #1Segmentation

2Productivity

If sputtering method is used to form source and drain regions, then throughput is enhanced, but contact resistance increases due to impurity precipitation and nitrogen compound formation

Engineering Contradiction:
ImprovethroughputVSAvoidcontact resistance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

Different impurity concentrations are applied to different regions: the first source/drain region has high impurity concentration for low contact resistance, while the second source/drain region has lower impurity concentration to prevent nitrogen compound formation. This local quality differentiation resolves the contradiction between throughput and contact resistance

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent converts the potential harm of impurity precipitation into a benefit by strategically placing lower concentration regions adjacent to the high concentration regions. The lower concentration regions act as buffer zones that prevent nitrogen compound formation while allowing the high concentration regions to provide low contact resistance

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances throughput by using the sputtering method for forming source and drain regions with controlled impurity concentrations, effectively reducing contact resistance while suppressing the formation of nitrogen compounds that increase resistance.

Implementation Method 1

a first source region containing a first electrically conductive impurity, provided on the bottom surface of the first opening... formed using a sputtering method

Methodology Applied
Scientific EffectSputtering: Sputtering

Data Source

PatentUS20220393025A1Semiconductor device and method for manufacturing semiconductor device
Publication Date: 2022.12.08 SUMITOMO ELECTRIC INDUSTRIES LTD
  • US20220393025A1 patent drawing
  • US20220393025A1 patent drawing
  • US20220393025A1 patent drawing

AI summary

A semiconductor device according to one aspect of the present disclosure includes a substrate including a first main surface, a semiconductor layer provided on the first main surface of the substrate, and a gate electrode, a source electrode, and a drain electrode, provided on the semiconductor layer. The semiconductor layer has an electron transit layer provided above the substrate and including a first upper surface, and an electron supply layer provided above the electron transit layer. The electron supply layer and the electron transit layer have a first opening and a second opening. A bottom surface of the first opening and a bottom surface of the second opening each exist at a deeper position toward the substrate than the first upper surface.