Graded Fluorine-Free Tungsten Word Lines in 3D Memory
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Solution Overview
Problem
Current three-dimensional memory devices face challenges in efficiently forming graded word lines with varying compositions and structures, which affect the performance and density of memory stack structures.
Innovation Solution
A method involving an alternating stack of insulating and sacrificial material layers over a substrate, where memory stack structures with vertical semiconductor channels are formed, and sacrificial layers are selectively removed to create backside recesses, followed by the deposition of fluorine-free tungsten layers with varying thicknesses in these recesses, allowing for the formation of electrically conductive layers with distinct proximal and distal regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If graded word lines with varying compositions and structures are formed, then memory stack structure performance and density are improved, but device complexity increases
Solution Approach 1:
The patent applies local quality by creating distinct proximal and distal regions within electrically conductive layers, where each region has different material compositions and thicknesses. The proximal regions adjacent to trenches have one composition/thickness while distal regions have another, enabling localized optimization of electrical properties without requiring complete restructuring of the entire device.
Solution Approach 2:
The electrically conductive layers are segmented into multiple distinct regions (proximal and distal) with varying compositions and thicknesses. This segmentation allows independent optimization of different portions of the conductive layer to achieve graded word line functionality while maintaining manufacturability through modular deposition processes.
2Reliability
If fluorine-free tungsten layers with greater thickness in distal regions are deposited, then electrical conductivity and storage capabilities are enhanced, but manufacturing precision requirements increase
Solution Approach 1:
The patent utilizes parameter changes by varying the thickness of fluorine-free tungsten layers deposited in distal regions compared to proximal regions. This thickness variation, combined with compositional differences, creates graded electrical properties that enhance conductivity and storage capability while being achievable through controlled deposition parameter adjustments.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the creation of three-dimensional memory devices with improved memory stack structure performance and density by ensuring the fluorine-free tungsten layers have greater thickness in the distal regions, enhancing the electrical conductivity and storage capabilities.
Implementation Method 1
forming fluorine-free tungsten layers in the respective backside recesses
Data Source
AI summary
A method of forming a three-dimensional memory device includes providing an alternating stack of insulating layers and sacrificial material layers located between a first trench and a second trench, forming memory stack structures extending vertically through the alternating stack, wherein each of the memory stack structures contains a memory film and a vertical semiconductor channel, removing the sacrificial material layers selective to the insulating layers through the first and the second trenches to form backside recesses having a first proximal region adjacent to the first trench, a second proximal region adjacent to the second trench and a distal region located between the first and the second proximal regions, and forming fluorine-free tungsten layers in the respective backside recesses such that each fluorine-free tungsten layer has a greater thickness in the distal region than in the first and the second proximal regions.