Gradient-Doped Control Gate for Uniform Memory Cell Etching

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Solution Overview

Problem

Conventional memory devices with non-gradient-doped control gate materials experience uneven etching, leading to concave side faces and increased memory cell footprint, which reduces memory density due to non-uniform dopant concentration.

Innovation Solution

Incorporating a gradient-doped control gate material with a non-uniform dopant concentration along the axis, specifically using polysilicon with varying phosphorous concentrations, to control the etching rate and achieve flatter side faces during the manufacturing process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional non-gradient-doped control gate material is used, then the manufacturing process is simpler, but uneven etching occurs leading to concave side faces and increased memory cell footprint

Engineering Contradiction:
Improveetching uniformityVSAvoiddoping profile complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The control gate material is doped with a gradient dopant concentration profile where the dopant concentration varies spatially - higher near the channel region and lower near the isolation material interface. This local variation in doping quality enables uniform etching rates across different regions of the control gate, preventing concave side faces while maintaining manufacturing feasibility.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The dopant concentration parameter is changed from uniform to gradient distribution throughout the control gate material. This parameter change transforms the etching behavior from non-uniform to uniform, as the gradient profile compensates for differential etching rates that would otherwise occur due to varying material composition near different interfaces.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If conventional non-gradient-doped control gate material is used, then the device structure is simpler, but memory density decreases due to increased memory cell footprint

Engineering Contradiction:
Improvememory densityVSAvoidside face flatness
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

By implementing a gradient dopant concentration profile with higher doping near the channel and lower doping near the isolation material, the control gate achieves uniform etching characteristics. This produces flat side faces that reduce the memory cell footprint, thereby increasing memory density without compromising manufacturing precision.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The gradient doping profile acts as a compensatory mechanism that balances etching rates across the control gate structure, similar to how pressure gradients balance fluid flow. The varying dopant concentration creates a self-regulating etching process that maintains side face flatness, enabling tighter cell spacing and higher memory density.

Inventive Principle:
Principle #29Pneumatics and hydraulics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The gradient-doped control gate material results in more uniform etching and reduced concavity, enhancing memory density by maintaining a desired shape and size of memory cells.

Implementation Method 1

the control gate material includes a dopant having a non-uniform concentration along the axis

Methodology Applied
Scientific EffectGradient doping: Diffusion

Data Source

PatentUS20230395729A1Memory devices with gradient-doped control gate material
Publication Date: 2023.12.07 INTEL NDTM US LLC
  • US20230395729A1 patent drawing
  • US20230395729A1 patent drawing
  • US20230395729A1 patent drawing

AI summary

Disclosed herein are memory devices with gradient-doped control gate material, as well as related methods and devices. In some embodiments, a memory device may include a first isolation material, a second isolation material, and a control gate material between the first isolation material and the second isolation material along an axis. The control gate material may include a dopant having a non-uniform concentration along the axis.