Semiconductor Source/Drain Gradient Doping to Reduce Junction Leakage
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Solution Overview
Problem
As semiconductor devices continue to shrink in size, the enlarged electric field resulting from anti-punch-through implantation leads to increased junction leakage current, which affects device performance and integration density.
Innovation Solution
Perform an anti-punch-through implantation on the upper portion of a semiconductor fin, followed by forming semiconductor nanostructures and recesses, and then deposit an undoped silicon layer with a gradient-doped profile, which is further implanted to create a gradient-doped epitaxial source/drain region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If anti-punch-through implantation is performed to prevent punch-through leakage, then punch-through leakage is reduced, but junction leakage current increases due to enlarged electric field
Solution Approach 1:
The patent applies local quality by creating a gradient-doped silicon layer with varying dopant concentrations at different depths. The dopant concentration increases from the top surface toward the bottom surface, providing localized electrical properties that specifically address the electric field enlargement issue at the junction region while maintaining punch-through protection in other areas.
Solution Approach 2:
The patent changes the dopant concentration parameter through ion implantation to create a gradient-doped profile. By controlling the implantation dose and energy, the dopant concentration is varied with depth, transforming the uniform doping into a gradient structure that reduces junction leakage current while maintaining device performance.
2Productivity
If minimum feature size is reduced to increase integration density, then more components are integrated into a given area, but additional manufacturing problems arise
Solution Approach 1:
The patent changes the doping parameters (dose, energy, angle) to create a gradient-doped profile that reduces junction leakage current. This allows devices to be scaled to smaller feature sizes with improved manufacturing precision, as the gradient doping structure helps mitigate the manufacturing problems that typically arise at reduced dimensions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method reduces junction leakage current by an order of magnitude, improving device performance and integration density while being compatible with existing manufacturing processes at lower costs.
Implementation Method 1
An ion implantation process is performed on the silicon layer such that the silicon layer has a gradient-doped profile
Data Source
AI summary
A method includes depositing a multi-layer stack over a semiconductor substrate, the multi-layer stack including a plurality of sacrificial layers that alternate with a plurality of channel layers; forming a first recess in the multi-layer stack; forming first spacers on sidewalls of the sacrificial layers in the first recess; depositing a first semiconductor material in the first recess, where the first semiconductor material is undoped, where the first semiconductor material is in physical contact with a sidewall and a bottom surface of at least one of the first spacers; implanting dopants in the first semiconductor material, where after implanting dopants the first semiconductor material has a gradient-doped profile; and forming an epitaxial source/drain region in the first recess over the first semiconductor material, where a material of the epitaxial source/drain region is different from the first semiconductor material.