Gradient Gate Stack for Low-Charge TFT Dielectric Interfaces
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Solution Overview
Problem
As semiconductor devices, such as thin film transistors (TFTs), are miniaturized, manufacturing and performance issues arise due to mechanical stresses at the interface between the dielectric material and the semiconductor, leading to net charge and reduced performance.
Innovation Solution
A gate stack for field effect transistors is designed with a gradient region between the dielectric layer and the diffusion barrier, where the stoichiometry of the materials changes gradually from that of the dielectric to that of the diffusion barrier, reducing mechanical stresses and avoiding abrupt stoichiometric changes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the dielectric layer and diffusion barrier are placed in direct contact to form the gate stack, then the device structure is simple and manufacturing is easier, but mechanical stresses accumulate at the interface leading to interstitial faults and vacancies in the dielectric material
Solution Approach 1:
A gradient layer is introduced as an intermediary between the dielectric layer and the diffusion barrier. This gradient layer has a composition that transitions gradually from the dielectric material at the bottom to the diffusion barrier material at the top, acting as a mediator that reduces mechanical stress concentration and prevents interstitial faults and vacancies in the dielectric material.
Solution Approach 2:
The composition of the gradient layer changes gradually from the dielectric material composition at the interface with the dielectric layer to the diffusion barrier composition at the interface with the diffusion barrier. This parameter change in material composition reduces the abruptness of the transition, thereby reducing mechanical stresses and preventing dielectric material degradation.
2Productivity
If the size of semiconductor devices is reduced to increase circuit densities, then productivity and circuit density are improved, but mechanical stresses and performance issues are exacerbated
Solution Approach 1:
The gradient layer composition transitions from dielectric material at the bottom to diffusion barrier material at the top, creating a gradual parameter change that reduces mechanical stress concentration. This allows for smaller device sizes and higher circuit densities while maintaining device performance and reliability.
Solution Approach 2:
The gate stack is formed as a composite structure comprising the dielectric layer, the gradient layer with varying composition, and the diffusion barrier layer. This composite material structure allows the gradient layer to mediate between the dielectric and diffusion barrier, reducing mechanical stresses even in miniaturized devices.
Data Source
AI summary
A novel gate stack for a field effect transistor reduces the net charge in the dielectric material of the gate stack adjacent the semiconductor material of the transistor. The gate stack includes a gradient region between the dielectric layer abutting the semiconductor material and the diffusion barrier abutting the gate material, wherein the stoichiometry of the materials in the gradient region changes from the stoichiometry of the dielectric material to the stoichiometry of the diffusion barrier while avoiding abrupt changes in stoichiometry.