GradientGraph Bottleneck Structures for Communications-System Modeling

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Solution Overview

Problem

The challenge of efficiently applying neural networks to complex systems such as compute and communications systems, particularly in small hardware devices, due to their large size and computational demands, is addressed by leveraging bottleneck structures to improve performance and accuracy.

Innovation Solution

The use of bottleneck structures, represented by GradientGraph technology, to model and optimize complex systems by computing gradients and quantifying ripple effects, thereby enhancing the performance of graph neural networks (GNNs) and reducing training and inference times.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If larger neural networks are used to improve accuracy and address more tasks, then modeling accuracy and task capability are improved, but computational power requirements and device size increase

Engineering Contradiction:
Improvemodeling accuracyVSAvoidcomputational power requirements
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the neural network into multiple layers with bottleneck structures, where intermediate layers have fewer neurons than input/output layers. This segmentation reduces the overall computational burden while maintaining modeling accuracy by strategically placing bottleneck layers that compress and transform features efficiently.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the structural parameters of the neural network by introducing bottleneck layers with reduced neuron counts. This parameter modification allows the network to maintain deep architecture for accuracy while reducing computational complexity at critical transformation points, resolving the contradiction between size and performance.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If larger neural networks are used to improve accuracy, then task capability is improved, but energy consumption increases

Engineering Contradiction:
Improvemodeling accuracyVSAvoidenergy consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

By segmenting the network into bottleneck layers, the patent reduces the number of parameters that need to be computed and transmitted in intermediate stages. This segmentation directly lowers energy consumption while preserving the deep architecture needed for high accuracy in mobile and embedded applications.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The bottleneck structure changes key structural parameters by reducing neuron counts in intermediate layers, which decreases the computational operations required and thus reduces energy consumption, while the overall network depth and strategic bottleneck placement maintain modeling accuracy.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If traditional neural networks are used to model complex systems, then comprehensive modeling is attempted, but training time and computational efficiency deteriorate

Engineering Contradiction:
Improvemodeling capabilityVSAvoidtraining time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The bottleneck structure segments the feature transformation process into manageable stages, where each bottleneck layer performs focused dimensionality reduction and feature extraction. This segmentation makes training more efficient by breaking down the complex learning task into smaller, more manageable computational steps.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12413483B2Systems and methods for using bottleneck structures to improve performance of machine learning-based modeling
Publication Date: 2025.09.09 QUALCOMM INC
  • US12413483B2 patent drawing
  • US12413483B2 patent drawing
  • US12413483B2 patent drawing

AI summary

A processor-implemented method for generating a digital model of a communications system using a bottleneck structure includes receiving information associated with a communications system including multiple elements. Each of the elements is configured to communicate with other elements of the communications system. A bottleneck structure is generated based on the information associated with the communications system. An artificial neural network (ANN) processes the bottleneck structure and the information associated with the communications system to generate a digital model corresponding to the communications system.