Display Panel Grading Wiring Design for Capacitance Control

The patent applies local quality by varying the width of first signal lines at different locations. Specifically, in regions where first signal lines overlap with second signal lines (forming cross-overs), the first signal lines are designed with a first width. In non-overlapping regions, the same first signal lines are designed with a second width that is larger than the first width. This local differentiation reduces cross-over capacitance in overlapping regions while maintaining sufficient signal transmission capability in non-overlapping regions.

The patent reduces cross-over capacitance by implementing different width designs for first signal lines in overlapping versus non-overlapping regions. By minimizing the width in overlapping regions, the cross-over capacitance is reduced, which prevents excessive operation temperature rise and signal delay. Meanwhile, the overall circuit layout space is optimized by allowing larger widths in non-overlapping regions where space is more available.

Instead of uniformly increasing the width of first signal lines, the patent implements a localized width adjustment strategy. The width is increased only in non-overlapping regions where it contributes to reducing resistance without increasing cross-over capacitance. In overlapping regions, the width is kept at a smaller value to minimize cross-over capacitance. This local differentiation resolves the contradiction between reducing resistance and minimizing cross-over capacitance.