Electrical Connection Structure With Grain-Boundary Inhibition Layer
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Solution Overview
Problem
The formation of air voids on the sidewalls of electrical connection structures in semiconductor devices, particularly in FinFETs, leads to increased resistance and reduced reliability due to grain growth during high-temperature processes, which is exacerbated by the absence of a glue layer and inappropriate anneal temperatures.
Innovation Solution
A method involving the use of a second metal material with a different oxidation/reduction potential to form an inhibition layer along grain boundaries, inhibiting further grain growth and reducing the likelihood and size of air voids by diffusing along these boundaries, thereby enhancing the reliability of the electrical connection structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If high-temperature annealing is performed to improve electrical connection, then grain growth occurs causing air void formation on sidewalls, but resistance increases and reliability decreases
Solution Approach 1:
A glue layer comprising an organic material is introduced as an intermediary between the fill metal and the surrounding environment. This glue layer prevents direct exposure of the fill metal to conditions that cause excessive grain growth, thereby maintaining electrical connection reliability while still allowing beneficial annealing to occur.
Solution Approach 2:
The patent modifies the chemical composition parameters by introducing an organic material (glue layer) with specific properties. This changes the thermal and chemical environment during annealing, controlling grain growth kinetics and preventing air void formation on sidewalls while maintaining low resistance.
2Manufacturing precision
If grain growth is allowed during annealing to reduce resistance, then air voids form on sidewalls, but device reliability deteriorates
Solution Approach 1:
The glue layer acts as a protective intermediary that constrains grain growth at the sidewall regions while permitting controlled grain growth in the bulk material. This selective control maintains low resistance through grain growth while preventing the formation of detrimental air voids that would compromise reliability.
Solution Approach 2:
The glue layer provides localized protection at the sidewall regions where air void formation is problematic, while allowing grain growth to proceed in other regions where it benefits resistance. This spatially differentiated approach optimizes both electrical performance and reliability.
3Reliability
If a glue layer is added to prevent grain growth and air void formation, then reliability improves, but device complexity increases
Solution Approach 1:
The glue layer serves as a simple intermediary material that can be integrated into existing manufacturing processes. Despite adding a layer, the overall process complexity is minimized by using standard deposition and annealing techniques, making the solution practical for industrial implementation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method significantly reduces the formation and size of air voids, maintaining low resistance and improving the overall reliability of the semiconductor device by controlling grain growth and preventing galvanic reactions.
Implementation Method 1
annealing the second metal material, wherein the second metal material diffuses along grain boundaries of grains of the first metal material, thereby forming an inhibition layer
Implementation Method 2
annealing the second metal material
Data Source
AI summary
A semiconductor device structure is provided. The semiconductor device structure includes a substrate, a conductive feature on the substrate, and an electrical connection structure on the conductive feature. The electrical connection includes a first grain made of a first metal material, and a first inhibition layer made of a second metal layer that is different than the first metal material. The first inhibition layer extends vertically along a first side of a grain boundary of the first grain and laterally along a bottom of the grain boundary of the first grain.