Granular Reset Management Circuit for Processor Subsystems

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Solution Overview

Problem

In multiprocessor systems, component failures can lead to processor downtime and system-wide downtime, as existing mechanisms lack the ability to perform granular resets without rebooting the entire system, which is inefficient and disrupts high availability requirements.

Innovation Solution

A reset management circuit that allows for granular resets of processor subsystems without system-wide reboots by identifying capable subsystems, stopping related traffic, performing resets, and reinitializing them independently, enabling continuous operation of unaffected components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a system-wide reboot is performed to address component failure, then the failed component can be reset, but the entire system experiences downtime and productivity is reduced

Engineering Contradiction:
Improvecomponent reset capabilityVSAvoidsystem uptime
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system is divided into independent reset domains allowing selective resetting of specific subsystems or components without affecting the entire system. Each domain can be independently controlled, enabling granular reset management that maintains productivity while ensuring reliability through targeted component resets.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the entire system is reset to address a single component failure, then the failed component is restored, but system complexity increases due to full system shutdown and restart procedures

Engineering Contradiction:
Improvesystem recoveryVSAvoidreset management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The reset management system is segmented into domain-specific control units that can independently manage resets within their respective domains. This reduces the complexity of system-wide reset procedures by localizing reset control to specific subsystems, making the overall reset management more manageable and less complex.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system performs preliminary identification of failed components and isolates them to specific reset domains before executing resets. This preliminary action prevents unnecessary system-wide shutdowns and simplifies the reset process by pre-determining the scope of required resets based on component failure locations.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If granular reset capability is implemented, then system uptime is maintained during component failures, but the device complexity increases due to additional reset management circuitry

Engineering Contradiction:
Improvesystem availabilityVSAvoidreset management structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The processor is divided into multiple independent reset domains, each with its own reset control capabilities. This segmentation enables granular reset management that maintains high system availability while controlling complexity through modular domain structures that can be independently managed and scaled.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The reset management circuitry is designed with universal control mechanisms that can manage multiple reset domains through a unified interface. This multi-functionality reduces the overall device complexity by using a single versatile reset management structure rather than separate dedicated circuits for each domain.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12045135B2System and method for granular reset management without reboot
Publication Date: 2024.07.23 INTEL CORP
  • US12045135B2 patent drawing
  • US12045135B2 patent drawing
  • US12045135B2 patent drawing

AI summary

A system for granular reset management without reboot is disclosed. The system may include a subsystem, a processor including a reset management circuit coupled to the subsystem. The reset management circuit may include circuitry to receive a command to reset the subsystem, determine whether the subsystem can be reset without performing a system wide reboot, and based on a determination that the subsystem can be reset without performing a system wide reboot, block the use of the subsystem, drain the subsystem, and reset the subsystem. Circuity and method are also disclosed.