Graph-Based Causality Ranking for IC Fault Debugging

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Solution Overview

Problem

Current electronic design automation (EDA) tools lack automated guidance for identifying the root causes of faults in integrated circuits, relying heavily on user experience and requiring manual tracing of faults, which is labor-intensive and inefficient.

Innovation Solution

A graph-based causality ranking system is used to model signal flow through integrated circuits, employing forward and backward propagation models to provide relative rankings of possible causes, utilizing machine learning techniques and statistical modeling to assist users in debugging by prioritizing potential causes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If manual debugging process is used to trace upstream faults step by step, then the debugging process can be performed without automated tools, but the process becomes labor intensive and time consuming

Engineering Contradiction:

Improvedebugging processVSAvoidtime to determine root cause

Core Design Contradiction:

Ease of operationVSLoss of time

Solution Approach 1:

The patent replaces the manual mechanical tracing process with an automated computer-implemented system that uses propagation models and graph analysis to automatically rank potential root causes, substituting human effort with automated computational methods

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent introduces a propagation model and graph-based causality ranking system as an intermediary between the fault symptom and the root cause, providing automated analysis and prioritization rather than direct manual tracing

Inventive Principle:

Principle #24Intermediary (Mediator)

2Extent of automation

If current EDA tools require user intervention without providing recommendations, then the tools remain simple and easy to implement, but the debugging process relies heavily on engineer experience and knowledge

Engineering Contradiction:

Improveautomated guidance for fault analysisVSAvoidcomplexity of EDA tool

Core Design Contradiction:

Extent of automationVSDevice complexity

Solution Approach 1:

The patent performs preliminary analysis by constructing propagation models and pre-computing causality rankings before the user needs to debug, automatically preparing potential root cause information in advance

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The system performs self-service by automatically analyzing fault propagation and generating causality rankings without requiring user intervention, making the tool provide recommendations autonomously

Inventive Principle:

Principle #25Self-service

Data Source

PatentUS12032887B2In-graph causality ranking for faults in the design of integrated circuits

Publication Date: 2024.07.09 SYNOPSYS INC

AI summary

In some aspects, a graph is used to assist users in cause analysis of faults. The graph represents signal flow through a design of an integrated circuit The graph includes graph elements, such as nodes and edges. The nodes may represent cells and nets in the circuit design, and the edges may represent signal flow between the cells and nets. A propagation model for the propagation of faults through the graph is constructed. The propagation model includes local propagation models for the propagation of faults through the graph elements. Propagation of a known fault backward through the graph is modeled using the propagation model. This results in a causality ranking of the graph elements as possible causes of the known fault. Information indicative of the causality ranking is displayed in a user interface that shows the design of the integrated circuit.