Graph Data Storage Partitioning for NUMA Access Efficiency

The patent applies segmentation by dividing the single physical memory into multiple virtual memory spaces, with each processor assigned a dedicated virtual memory space. This logical segmentation allows processors to access their assigned data without contention, improving data access efficiency while maintaining the simplicity of a single physical memory structure. The virtual memory spaces are managed through a memory management unit that handles address translation and allocation.

The patent implements local quality by allowing each processor to have preferential access to a specific portion of the memory space assigned to its virtual memory space. This creates local memory regions with optimized access characteristics for each processor, reducing communication overhead and memory access conflicts. The memory management unit enforces these local access patterns, improving overall system performance while maintaining manageable memory operations through standardized allocation protocols.

The patent applies dimensionality change by introducing a virtual memory space dimension that overlays the physical NUMA architecture. This virtual dimension provides a unified address space for programmers while the underlying system manages the complexity of mapping virtual addresses to physical NUMA nodes. The memory management unit handles the translation and routing, allowing processors to access data on appropriate NUMA nodes without programmers needing to understand NUMA complexity, thus improving processing throughput while abstracting away the architectural complexity.