Graph Model Index Nodes for Low-Latency Secure Retrieval

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Solution Overview

Problem

Conventional data indexing methods in storage systems involve significant latency and security risks due to separate storage of index files, which can expose sensitive data and induce latency proportional to the size of the index file.

Innovation Solution

The implementation of index records within executable graph-based models, where index nodes are integrated with data nodes, reducing latency and ensuring secure access by only allowing entities associated with operational facets to access index nodes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If index files are stored separately from data, then data retrieval speed is improved through indexing, but security risks increase and latency is induced proportional to index file size

Engineering Contradiction:
Improvedata retrieval speedVSAvoidsecurity risks
Core Design Contradiction:
SpeedVSObject-affected harmful factors

Solution Approach 1:

The patent merges index nodes and data nodes into a single integrated graph-based model structure. Index records are embedded within the graph model itself rather than stored in separate index files, eliminating the security risks associated with separate index storage while maintaining fast retrieval capabilities through the graph's inherent indexing structure.

Inventive Principle:
Principle #5Merging (Combining)

2Ease of operation

If index files are stored separately from data, then data identification is facilitated, but latency increases proportional to the size of the index file

Engineering Contradiction:
Improvedata identificationVSAvoidlatency
Core Design Contradiction:
Ease of operationVSLoss of time

Solution Approach 1:

By combining index and data into a unified graph structure, the patent eliminates the need to traverse separate index files. The graph model allows direct navigation from index nodes to data nodes through defined relationships, significantly reducing the time required for data identification while maintaining ease of access.

Inventive Principle:
Principle #5Merging (Combining)

3Device complexity

If separate index files are used, then data storage is organized, but access security is compromised due to exposure of sensitive data

Engineering Contradiction:
Improvedata organizationVSAvoidaccess security
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent integrates index and data storage within a single graph-based model, eliminating separate index files that expose sensitive data. The graph structure maintains organized data relationships through nodes and edges while enforcing security through controlled access to graph elements, thereby preserving both organization and security.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The graph model acts as an intermediary layer between storage and access. Index nodes serve as intermediaries that reference data nodes without exposing the underlying data structure, providing organized access while maintaining security through the graph's encapsulated architecture.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12511274B2Indexing in graph-based models
Publication Date: 2025.12.30 INFOSYS LTD
  • US12511274B2 patent drawing
  • US12511274B2 patent drawing
  • US12511274B2 patent drawing

AI summary

An overlay system is provided that includes a storage element and processing circuitry. The storage element stores an executable graph-based model that includes node templates, node instances, and index nodes. Each node template is associated with one or more node instances and one or more index nodes. Further, each index node includes index records. The processing circuitry receives a contextualized stimulus associated with the overlay system and identifies one or more index records that include an index value indicated by the contextualized stimulus. Based on the identified one or more index records, the processing circuitry further identifies one or more node instances required for stimulus processing. Further, the processing circuitry executes an operation associated with the stimulus based on the identified one or more node instances and each node template associated with the identified one or more node instances.