Graph Orchestration for Reconfigurable Processor Partition Scheduling

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Solution Overview

Problem

Existing systems with reconfigurable processors face challenges in efficiently managing control flows during the execution of dataflow graphs, leading to suboptimal performance in terms of execution time and computing resource utilization.

Innovation Solution

An intelligent graph orchestration and execution engine (IGOEE) is employed to reorganize the sequence of temporal partitions and graph control operations within a reconfigurable processor, optimizing for objectives such as minimizing execution time and maximizing resource utilization by intelligently grouping and pipelining graph control operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the compiler generates many control flows for executing dataflow graphs, then the system can handle complex computations, but the management of control flows becomes inefficient leading to suboptimal performance

Engineering Contradiction:
Improvecapability to handle complex computationsVSAvoidexecution efficiency
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent segments the dataflow graph into multiple temporal partitions, where each partition represents a discrete time step with specific operations. This segmentation allows the system to manage complex control flows by breaking them down into smaller, more manageable units that can be executed and optimized independently, thereby maintaining adaptability while improving execution efficiency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces dynamic reconfiguration capabilities that allow the system to adapt the control flow management strategy based on the specific characteristics of the dataflow graph being executed. The compiler can generate optimized control flows dynamically tailored to each computation task, rather than using a static management approach, thus resolving the contradiction between handling complexity and maintaining efficiency.

Inventive Principle:
Principle #15Dynamics

2Ease of manufacture

If temporal partitions and graph control operations are executed in a fixed sequence, then the implementation is simple, but the execution time and resource utilization are suboptimal

Engineering Contradiction:
Improveimplementation simplicityVSAvoidexecution time
Core Design Contradiction:
Ease of manufactureVSLoss of time

Solution Approach 1:

The patent applies preliminary action by having the compiler analyze and optimize the sequence of temporal partitions and graph control operations before execution. The compiler generates optimized control flows that anticipate and prepare for execution requirements, reorganizing operations to minimize execution time and improve resource utilization while maintaining implementation feasibility through automated compilation processes.

Inventive Principle:
Principle #10Preliminary action

3Device complexity

If the system executes dataflow graphs with minimal reorganization, then the overhead is low, but computing resource utilization is not maximized

Engineering Contradiction:
Improvesystem overheadVSAvoidcomputing resource utilization
Core Design Contradiction:
Device complexityVSUse of energy by moving object

Solution Approach 1:

The patent changes key parameters of the control flow execution, including the sequencing of temporal partitions and the grouping of graph control operations. By optimizing these parameters through compiler analysis and generation, the system achieves better computing resource utilization without introducing significant overhead, as the optimizations are embedded in the compilation process rather than requiring complex runtime reconfiguration.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20260056913A1Intelligent graph execution for a reconfigurable data processor
Publication Date: 2026.02.26 SAMBANOVA SYSTEMS INC
  • US20260056913A1 patent drawing
  • US20260056913A1 patent drawing
  • US20260056913A1 patent drawing

AI summary

A data processing system including an array of reconfigurable units and a compiler configured to generate to execute a dataflow graph of a user application is disclosed. The dataflow graph includes a sequence of temporal partitions, each temporal partition including a sequence of graph control operations. Also disclosed is an intelligent graph orchestration and execution engine (IGOEE) configured to receive an optimization objective from the complier. The IGOEE can reorganize the sequence of temporal partitions and the sequence of graph control operations within each temporal partition to satisfy the optimization objective, and execute the reorganized dataflow graph on the reconfigurable processor.