Graphene Amorphous Silicon Sensing Device
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Solution Overview
Problem
Conventional image sensing arrays require numerous photolithography and etching processes, leading to complex manufacturing processes and high costs, and have a thick PIN layer for high quantum efficiency, which complicates production.
Innovation Solution
A sensing apparatus with a reduced number of photolithography and etching processes is developed, utilizing a sensing device comprising an amorphous silicon layer and a graphene layer, allowing for efficient light sensing and large-area production with a thinner structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a PIN layer with sufficient thickness (1.0 μm to 1.5 μm) is deposited to achieve high quantum efficiency, then the incident photon-to-electron conversion efficiency is improved, but the manufacturing time and cost increase significantly
Solution Approach 1:
The patent changes the material parameter from conventional silicon-based PIN layer to graphene layer, which achieves high quantum efficiency with much thinner thickness (0.3 μm to 0.5 μm), thereby reducing deposition time while maintaining or improving performance
Solution Approach 2:
The patent uses a composite structure combining amorphous silicon layer and graphene layer to create a sensing device that achieves high quantum efficiency with reduced thickness, resolving the contradiction between efficiency and deposition time
2Manufacturing precision
If a conventional image sensing array is manufactured using eleven photolithography and etching processes, then the sensing device can be formed with proper structure, but the manufacturing complexity and cost increase
Solution Approach 1:
The patent merges multiple manufacturing steps into fewer photolithography and etching processes by designing a sensing device structure that can be formed with simplified processes, reducing manufacturing complexity while maintaining structural precision
Solution Approach 2:
The patent changes the material system to amorphous silicon and graphene, which can be processed with fewer photolithography and etching steps compared to conventional crystalline silicon, thereby reducing manufacturing complexity
3Reliability
If a PIN layer with sufficient thickness is used to achieve high quantum efficiency, then the sensing performance is improved, but the overall device thickness increases
Solution Approach 1:
The patent changes the material from conventional silicon to graphene, which achieves high quantum efficiency with much thinner thickness, directly resolving the contradiction between sensing performance and device thickness
Solution Approach 2:
The patent employs thin film graphene layer (0.3 μm to 0.5 μm) instead of thick silicon layer, achieving the function of light sensing with minimal thickness, thereby resolving the contradiction between efficiency and thickness
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces manufacturing complexity and costs while maintaining favorable incident photon-to-electron conversion efficiency, making it suitable for large-area production and applications like medical digital X-ray detectors.
Implementation Method 1
the sensing device includes an amorphous silicon layer and a graphene layer... the sensing device senses light through a junction constituted by the amorphous silicon layer and the graphene layer
Data Source
AI summary
A sensing apparatus that includes a plurality of sensing pixels is provided. The sensing pixels are arranged in an array, and each of the sensing pixels includes an active device and a sensing device. The sensing device is electrically connected to the active device, and the sensing device includes a first electrode layer, an amorphous silicon layer, a second electrode layer, and a graphene layer. The amorphous silicon layer is located on the first electrode layer. The second electrode layer is located on the amorphous silicon layer and has an opening. The graphene layer is in contact with the second electrode layer and the amorphous silicon layer.