Graphene Barrier Metal Layer for Semiconductor Interconnects
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Solution Overview
Problem
Current semiconductor interconnect structures face challenges with electromigration and oxygen intrusion due to the volume consumption of traditional barrier metal layers like tantalum or tantalum nitride, leading to increased resistivity and reduced reliability, especially as device sizes shrink.
Innovation Solution
A graphene-based barrier metal layer is used to block oxygen intrusion from the dielectric layer into the interconnect structure and prevent copper diffusion into the dielectric layer, allowing for a thinner, more efficient barrier that reduces resistivity and enhances electromigration reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a traditional barrier metal layer (tantalum or tantalum nitride) is used to block oxygen intrusion and copper diffusion, then reliability is improved, but the volume of the interconnect structure is consumed, leaving less volume for copper deposition and increasing resistivity
Solution Approach 1:
The patent changes the material parameter of the barrier layer from traditional tantalum/tantalum nitride to graphene. Graphene provides equivalent or superior barrier properties against oxygen and copper diffusion while occupying significantly less volume (atomic-layer thickness), thereby resolving the contradiction between reliability improvement and volume consumption for copper deposition
Solution Approach 2:
The patent employs a composite interconnect structure combining graphene barrier layer with copper fill material. The graphene-copper composite achieves both high reliability (oxygen blocking, copper diffusion prevention) and high copper volume fraction, eliminating the trade-off present in traditional single-material barrier systems
2Reliability
If a thicker barrier metal layer is used to adequately block oxygen intrusion and copper diffusion, then reliability is improved, but the interconnect structure has higher resistivity and reduced signal propagation speed
Solution Approach 1:
The patent changes the thickness parameter of the barrier layer by using graphene's atomic-layer thickness (sub-nanometer scale) instead of conventional 5-10 nm barrier layers. This ultra-thin configuration minimizes volume occupation and resistive-capacitive delay, enabling fast signal propagation while maintaining adequate barrier functionality through graphene's inherent impermeability to oxygen and copper atoms
3Productivity
If copper is used for interconnects to provide low resistivity and high current carrying capacity, then productivity is improved, but oxygen intrusion increases resistivity and reduces current flow
Solution Approach 1:
The patent introduces graphene as an intermediary barrier layer between the copper interconnect and the dielectric environment. This graphene mediator blocks oxygen from reaching the copper, preventing oxidation that would increase resistivity and reduce current flow, thereby maintaining stable current carrying capacity without sacrificing productivity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The graphene-based barrier metal layer improves signal propagation speed, reduces void and hillock formation, and extends the useful life of semiconductor products by minimizing data loss and enhancing electromigration reliability.
Implementation Method 1
utilizing a graphene-based barrier metal layer to block oxygen intrusion from a dielectric layer into the interconnect structure
Implementation Method 2
block copper diffusion from the interconnect structure into the dielectric layer
Data Source
AI summary
An interconnect structure and method for fabricating the interconnect structure having enhanced performance and reliability, by utilizing a graphene-based barrier metal layer to block oxygen intrusion from a dielectric layer into the interconnect structure and block copper diffusion from the interconnect structure into the dielectric layer, are disclosed. At least one opening is formed in a dielectric layer. A graphene-based barrier metal layer disposed on the dielectric layer is formed. A seed layer disposed on the graphene-based barrier metal layer is formed. An electroplated copper layer disposed on the seed layer is formed. A planarized surface is formed, wherein a portion of the graphene-based barrier metal layer, the seed layer, and the electroplated copper layer are removed. In addition, a capping layer disposed on the planarized surface is formed.