Graphene Base Transistor Reduces Collector Capacitance
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Solution Overview
Problem
Conventional semiconductor transistors face limitations in achieving high frequency and temperature operation due to high base resistance and collector-base capacitance, which restricts their maximum frequency of oscillation and thermal management.
Innovation Solution
A graphene base transistor with a reduced collector area is developed, utilizing graphene sheets as the base material layer, integrated with low-K dielectric materials and dielectric spacers to minimize capacitance and enhance thermal conductivity, along with epitaxial growth and selective doping to optimize heterojunctions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional semiconductor materials are used for the base region, then the transistor structure is simple to manufacture, but the base resistance is high which limits maximum frequency of oscillation
Solution Approach 1:
The patent changes the fundamental material parameter of the base region from conventional semiconductors to graphene, which has inherently lower resistance and higher carrier mobility. This material substitution directly reduces base resistance and enables higher maximum frequency of oscillation, though it requires advanced fabrication techniques for graphene integration
Solution Approach 2:
The patent employs a composite structure combining graphene base material with heterojunction semiconductor layers (such as GaN/AlGaN). This composite approach leverages the low resistance of graphene while maintaining compatibility with semiconductor fabrication processes, achieving both high frequency performance and manufacturability
2Reliability
If the collector area is reduced to lower capacitance, then the maximum frequency of oscillation increases, but the collector current and power handling capability decrease
Solution Approach 1:
The patent applies local quality by creating a non-uniform collector structure where the collector area under the base is reduced to minimize capacitance, while the emitter area is enlarged to maintain high current injection capability. This localized optimization allows the collector to have low capacitance for high frequency operation while the emitter provides sufficient current for power handling
Solution Approach 2:
The patent transitions from a planar transistor design to a three-dimensional structure with elevated emitter and collector regions. By raising the emitter and collector above the substrate plane and reducing the lateral collector area, the design achieves low capacitance in the critical base-collector region while maintaining vertical current flow paths that preserve power handling capability
3Reliability
If the base region area is reduced to lower capacitance, then the maximum frequency of oscillation increases, but the base current and current gain decrease
Solution Approach 1:
The patent changes the base material to graphene, which has extremely high carrier mobility and low resistance. This material parameter change allows the base region to be made very thin and small in area, reducing capacitance for high frequency operation, while the superior electrical properties of graphene compensate for the reduced area by maintaining low base current and high current gain
4Temperature
If conventional materials are used for thermal management, then the device structure is simple, but the thermal conductivity is insufficient for high temperature operation
Solution Approach 1:
The patent employs composite materials with high thermal conductivity, such as diamond or cubic boron nitride, in the thermal management structure. These advanced materials provide superior heat dissipation capabilities enabling high temperature operation, though they add complexity to the device structure and require specialized fabrication processes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design achieves low base resistance, high maximum frequency of oscillation, and high temperature operation by reducing transit time and energy loss, while improving thermal management and carrier velocity, enabling high power and frequency performance.
Implementation Method 1
a base region (second region) with the base region consisting of one or more sheets of graphene known as the base graphene material layer region that is intermediate the first and third regions and forms electrical interfaces therewith
Implementation Method 2
integrated with low-K dielectric materials and dielectric spacers to minimize capacitance
Implementation Method 3
along with epitaxial growth and selective doping to optimize heterojunctions
Implementation Method 4
along with epitaxial growth and selective doping to optimize heterojunctions
Data Source
AI summary
A method of making a graphene base transistor with reduced collector area comprising forming an electron injection region, forming an electron collection region, and forming a base region wherein the base region comprises one or more sheets of graphene and wherein the base region is intermediate the electron injection region and the electron collection region and forms electrical interfaces therewith.