3D Graphene Channel Transistor With Transfer Layer
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Solution Overview
Problem
Silicon-based semiconductor devices face limitations in integration density and performance, prompting the need for next-generation materials like graphene to overcome these constraints, particularly in achieving higher integration and scaling down while maintaining effective channel lengths and preventing damage or contamination.
Innovation Solution
The development of transistors with a 3D graphene channel and a manufacturing method that includes a 3D channel structure, adjustable effective channel length, and self-aligned source and drain electrode portions to ensure high integration density and prevent damage to the graphene material, using a substrate with an insulating layer and multiple gates for improved performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If graphene is used as channel material to overcome Si limitations, then carrier mobility and performance are improved, but damage or contamination to graphene occurs during manufacturing
Solution Approach 1:
A transfer layer is introduced as an intermediary between the graphene and the substrate/electrodes. This transfer layer protects the graphene from direct contact with harmful manufacturing processes and materials, preventing contamination and damage while still allowing electrical contact to be established.
Solution Approach 2:
The device structure is segmented into distinct layers: substrate, transfer layer, graphene channel, and electrode portions. The transfer layer acts as a separate protective segment that isolates the fragile graphene from the substrate and electrode materials, preventing direct harmful interactions.
2Productivity
If integration density is increased and scaling is reduced, then device capacity is improved, but effective channel length control becomes difficult
Solution Approach 1:
The electrode portions extend in the vertical dimension (thickness direction) rather than only in the horizontal plane. This vertical extension allows the effective channel length to be controlled by the electrode thickness parameter, providing an additional dimensional degree of freedom for scaling and integration.
Solution Approach 2:
The effective channel length is controlled by changing the thickness parameter of the electrode portions rather than their lateral dimensions. This parameter change enables precise control of channel length independent of the overall device footprint, facilitating scaling and high integration density.
3Reliability
If electrode portions are positioned to contact graphene, then electrical connection is achieved, but misalignment and contamination occur
Solution Approach 1:
The transfer layer serves as a mediator between the electrode portions and the graphene channel. It allows the electrodes to be positioned without requiring precise alignment with the graphene, as the transfer layer compensates for misalignment while maintaining electrical connectivity.
Solution Approach 2:
The transfer layer automatically compensates for alignment variations between electrodes and graphene through its material properties and positioning, eliminating the need for high-precision alignment processes. The system self-adjusts to maintain proper electrical connection.
Data Source
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AI summary
Transistors and methods of manufacturing the same may include a gate (G1) on a substrate, a graphene channel layer (C1) having a three-dimensional (3D) channel region covering at least a portion of a gate, a source electrode (S1) contacting a first region of the channel layer, and a drain electrode (D1) contacting a second region of the channel layer.